390 lines
8.8 KiB
C
390 lines
8.8 KiB
C
/*
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* (C) Copyright 2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2004
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* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
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*
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* (C) Copyright 2006
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* Eric Schumann, Phytec Messtechnik GmbH
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <driver.h>
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#include <cfi_flash.h>
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#include <init.h>
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#include <asm/arch/mpc5xxx.h>
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#include <asm/arch/fec.h>
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#include <types.h>
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#include <partition.h>
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#include <mem_malloc.h>
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#include <reloc.h>
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#ifdef CONFIG_VIDEO_OPENIP
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#include <openip.h>
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#endif
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struct device_d cfi_dev = {
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.name = "cfi_flash",
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.id = "nor0",
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.map_base = 0xff000000,
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.size = 16 * 1024 * 1024,
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};
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struct device_d sdram_dev = {
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.name = "ram",
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.id = "ram0",
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.map_base = 0x0,
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.size = 64 * 1024 * 1024,
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.type = DEVICE_TYPE_DRAM,
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};
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struct device_d scratch_dev = {
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.name = "ram",
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.id = "scratch0",
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.type = DEVICE_TYPE_DRAM,
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};
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static struct mpc5xxx_fec_platform_data fec_info = {
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.xcv_type = MII100,
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};
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struct device_d eth_dev = {
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.name = "fec_mpc5xxx",
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.id = "eth0",
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.map_base = MPC5XXX_FEC,
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.platform_data = &fec_info,
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.type = DEVICE_TYPE_ETHER,
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};
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#define SCRATCHMEM_SIZE (1024 * 1024 * 4)
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static int devices_init (void)
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{
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register_device(&cfi_dev);
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register_device(&sdram_dev);
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register_device(ð_dev);
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scratch_dev.map_base = (unsigned long)sbrk_no_zero(SCRATCHMEM_SIZE);
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scratch_dev.size = SCRATCHMEM_SIZE;
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register_device(&scratch_dev);
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dev_add_partition(&cfi_dev, 0x00f00000, 0x40000, PARTITION_FIXED, "self");
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dev_add_partition(&cfi_dev, 0x00f60000, 0x20000, PARTITION_FIXED, "env");
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return 0;
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}
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device_initcall(devices_init);
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static struct device_d psc3 = {
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.name = "mpc5xxx_serial",
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.id = "psc3",
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.map_base = MPC5XXX_PSC3,
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.size = 4096,
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.type = DEVICE_TYPE_CONSOLE,
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};
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static struct device_d psc6 = {
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.name = "mpc5xxx_serial",
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.id = "psc6",
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.map_base = MPC5XXX_PSC6,
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.size = 4096,
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.type = DEVICE_TYPE_CONSOLE,
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};
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static int console_init(void)
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{
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register_device(&psc3);
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register_device(&psc6);
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return 0;
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}
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console_initcall(console_init);
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void *get_early_console_base(const char *name)
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{
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if (!strcmp(name, RELOC("psc3")))
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return (void *)MPC5XXX_PSC3;
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if (!strcmp(name, RELOC("psc6")))
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return (void *)MPC5XXX_PSC6;
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return NULL;
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}
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#include "mt46v32m16-75.h"
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static void sdram_start (int hi_addr)
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{
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long hi_addr_bit = hi_addr ? 0x01000000 : 0;
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/* unlock mode register */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000000 | hi_addr_bit;
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__asm__ volatile ("sync");
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/* precharge all banks */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
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__asm__ volatile ("sync");
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#if SDRAM_DDR
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/* set mode register: extended mode */
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*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_EMODE;
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__asm__ volatile ("sync");
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/* set mode register: reset DLL */
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*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE | 0x04000000;
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__asm__ volatile ("sync");
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#endif
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/* precharge all banks */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000002 | hi_addr_bit;
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__asm__ volatile ("sync");
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/* auto refresh */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | 0x80000004 | hi_addr_bit;
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__asm__ volatile ("sync");
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/* set mode register */
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*(vu_long *)MPC5XXX_SDRAM_MODE = SDRAM_MODE;
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__asm__ volatile ("sync");
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/* normal operation */
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*(vu_long *)MPC5XXX_SDRAM_CTRL = SDRAM_CONTROL | hi_addr_bit;
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__asm__ volatile ("sync");
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}
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/*
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* ATTENTION: Although partially referenced initdram does NOT make real use
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* use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE
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* is something else than 0x00000000.
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*/
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long int initdram (int board_type)
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{
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ulong dramsize = 0;
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ulong dramsize2 = 0;
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ulong test1, test2;
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if ((ulong)RELOC(initdram) > (2 << 30)) {
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/* setup SDRAM chip selects */
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001b;/* 256MB at 0x0 */
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*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x10000000;/* disabled */
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__asm__ volatile ("sync");
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/* setup config registers */
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*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = SDRAM_CONFIG1;
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*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = SDRAM_CONFIG2;
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__asm__ volatile ("sync");
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#if SDRAM_DDR && SDRAM_TAPDELAY
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/* set tap delay */
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*(vu_long *)MPC5XXX_CDM_PORCFG = SDRAM_TAPDELAY;
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__asm__ volatile ("sync");
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#endif
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/* find RAM size using SDRAM CS0 only */
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sdram_start(0);
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test1 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x10000000);
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sdram_start(1);
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test2 = get_ram_size((ulong *)CFG_SDRAM_BASE, 0x10000000);
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if (test1 > test2) {
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sdram_start(0);
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dramsize = test1;
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} else {
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dramsize = test2;
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}
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/* memory smaller than 1MB is impossible */
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if (dramsize < (1 << 20)) {
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dramsize = 0;
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}
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/* set SDRAM CS0 size according to the amount of RAM found */
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if (dramsize > 0) {
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 + __builtin_ffs(dramsize >> 20) - 1;
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} else {
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*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
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}
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} else
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puts(RELOC("skipping sdram initialization\n"));
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/* retrieve size of memory connected to SDRAM CS0 */
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dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
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if (dramsize >= 0x13) {
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dramsize = (1 << (dramsize - 0x13)) << 20;
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} else {
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dramsize = 0;
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}
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/* retrieve size of memory connected to SDRAM CS1 */
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dramsize2 = *(vu_long *)MPC5XXX_SDRAM_CS1CFG & 0xFF;
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if (dramsize2 >= 0x13) {
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dramsize2 = (1 << (dramsize2 - 0x13)) << 20;
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} else {
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dramsize2 = 0;
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}
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return dramsize + dramsize2;
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}
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#ifdef CONFIG_PCI
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static struct pci_controller hose;
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extern void pci_mpc5xxx_init(struct pci_controller *);
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void pci_init_board(void)
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{
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pci_mpc5xxx_init(&hose);
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}
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#endif
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#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
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void
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ft_board_setup(void *blob, bd_t *bd)
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{
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ft_cpu_setup(blob, bd);
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}
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#endif
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#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
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#define GPIO_PSC2_4 0x02000000UL
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void init_ide_reset (void)
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{
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debug ("init_ide_reset\n");
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/* Configure PSC2_4 as GPIO output for ATA reset */
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*(vu_long *) MPC5XXX_WU_GPIO_ENABLE |= GPIO_PSC2_4;
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*(vu_long *) MPC5XXX_WU_GPIO_DIR |= GPIO_PSC2_4;
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/* Deassert reset */
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*(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC2_4;
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}
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void ide_set_reset (int idereset)
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{
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debug ("ide_reset(%d)\n", idereset);
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if (idereset) {
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*(vu_long *) MPC5XXX_WU_GPIO_DATA &= ~GPIO_PSC2_4;
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/* Make a delay. MPC5200 spec says 25 usec min */
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udelay(500000);
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} else {
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*(vu_long *) MPC5XXX_WU_GPIO_DATA |= GPIO_PSC2_4;
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}
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}
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#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
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#ifdef CONFIG_VIDEO_OPENIP
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#define DISPLAY_WIDTH 320
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#define DISPLAY_HEIGHT 240
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#ifdef CONFIG_VIDEO_OPENIP_8BPP
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#error CONFIG_VIDEO_OPENIP_8BPP not supported.
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#endif /* CONFIG_VIDEO_OPENIP_8BPP */
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#ifdef CONFIG_VIDEO_OPENIP_16BPP
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#error CONFIG_VIDEO_OPENIP_16BPP not supported.
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#endif /* CONFIG_VIDEO_OPENIP_16BPP */
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#ifdef CONFIG_VIDEO_OPENIP_32BPP
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static const SMI_REGS init_regs [] =
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{
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{0x00008, 0x0248013f},
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{0x0000c, 0x021100f0},
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{0x00010, 0x018c0106},
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{0x00014, 0x00800000},
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{0x00018, 0x00800000},
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{0x00000, 0x00003701},
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{0, 0}
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};
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#endif /* CONFIG_VIDEO_OPENIP_32BPP */
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#ifdef CONFIG_CONSOLE_EXTRA_INFO
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/*
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* Return text to be printed besides the logo.
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*/
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void video_get_info_str (int line_number, char *info)
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{
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if (line_number == 1) {
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strcpy (info, " Board: phyCORE-MPC5200B tiny (Phytec Messtechnik GmbH)");
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} else if (line_number == 2) {
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strcpy (info, " on a PCM-980 baseboard");
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}
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else {
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info [0] = '\0';
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}
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}
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#endif
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/*
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* Returns OPENIP register base address. First thing called in the driver.
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*/
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unsigned int board_video_init (void)
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{
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ulong dummy;
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dummy = *(vu_long *)OPENIP_MMIO_BASE; /*dummy read*/
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dummy = *(vu_long *)OPENIP_MMIO_BASE; /*dummy read*/
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return OPENIP_MMIO_BASE;
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}
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/*
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* Returns OPENIP framebuffer address
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*/
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unsigned int board_video_get_fb (void)
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{
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return OPENIP_FB_BASE;
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}
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/*
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* Called after initializing the OPENIP and before clearing the screen.
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*/
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void board_validate_screen (unsigned int base)
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{
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}
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/*
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* Return a pointer to the initialization sequence.
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*/
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const SMI_REGS *board_get_regs (void)
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{
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return init_regs;
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}
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int board_get_width (void)
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{
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return DISPLAY_WIDTH;
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}
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int board_get_height (void)
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{
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return DISPLAY_HEIGHT;
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}
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#endif /* CONFIG_VIDEO_OPENIP */
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