321 lines
6.9 KiB
C
321 lines
6.9 KiB
C
/*
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* iim.c - i.MX IIM fusebox driver
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*
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* Provide an interface for programming and sensing the information that are
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* stored in on-chip fuse elements. This functionality is part of the IC
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* Identification Module (IIM), which is present on some i.MX CPUs.
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*
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* Copyright (c) 2010 Baruch Siach <baruch@tkos.co.il>,
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* Orex Computed Radiography
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <common.h>
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#include <init.h>
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#include <driver.h>
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#include <xfuncs.h>
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#include <errno.h>
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#include <param.h>
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#include <fcntl.h>
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#include <malloc.h>
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#include <io.h>
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#include <mach/iim.h>
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#define DRIVERNAME "imx_iim"
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static unsigned long mac_addr_base;
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struct iim_priv {
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struct cdev cdev;
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void __iomem *base;
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void __iomem *bankbase;
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int bank;
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int banksize;
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};
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static int do_fuse_sense(void __iomem *reg_base, unsigned int bank,
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unsigned int row)
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{
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u8 err, stat;
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if (bank > 7) {
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printf("%s: invalid bank number\n", __func__);
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return -EINVAL;
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}
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if (row > 255) {
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printf("%s: invalid row index\n", __func__);
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return -EINVAL;
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}
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/* clear status and error registers */
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writeb(3, reg_base + IIM_STATM);
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writeb(0xfe, reg_base + IIM_ERR);
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/* upper and lower address halves */
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writeb((bank << 3) | (row >> 5), reg_base + IIM_UA);
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writeb((row << 3) & 0xf8, reg_base + IIM_LA);
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/* start fuse sensing */
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writeb(0x08, reg_base + IIM_FCTL);
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/* wait for sense done */
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while ((readb(reg_base + IIM_STAT) & 0x80) != 0)
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;
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stat = readb(reg_base + IIM_STAT);
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writeb(stat, reg_base + IIM_STAT);
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err = readb(reg_base + IIM_ERR);
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if (err) {
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printf("%s: sense error (0x%02x)\n", __func__, err);
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return -EIO;
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}
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return readb(reg_base + IIM_SDAT);
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}
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static ssize_t imx_iim_cdev_read(struct cdev *cdev, void *buf, size_t count,
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loff_t offset, ulong flags)
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{
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ulong size, i;
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struct iim_priv *priv = cdev->priv;
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const char *sense_param;
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unsigned long explicit_sense = 0;
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if ((sense_param = dev_get_param(cdev->dev, "explicit_sense_enable")))
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explicit_sense = simple_strtoul(sense_param, NULL, 0);
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size = min((loff_t)count, priv->banksize - offset);
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if (explicit_sense) {
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for (i = 0; i < size; i++) {
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int row_val;
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row_val = do_fuse_sense(priv->base,
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priv->bank, offset + i);
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if (row_val < 0)
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return row_val;
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((u8 *)buf)[i] = (u8)row_val;
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}
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} else {
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for (i = 0; i < size; i++)
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((u8 *)buf)[i] = ((u8 *)priv->bankbase)[(offset+i)*4];
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}
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return size;
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}
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#ifdef CONFIG_IMX_IIM_FUSE_BLOW
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static int do_fuse_blow(void __iomem *reg_base, unsigned int bank,
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unsigned int row, u8 value)
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{
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int bit, ret = 0;
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u8 err, stat;
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if (bank > 7) {
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printf("%s: invalid bank number\n", __func__);
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return -EINVAL;
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}
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if (row > 255) {
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printf("%s: invalid row index\n", __func__);
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return -EINVAL;
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}
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/* clear status and error registers */
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writeb(3, reg_base + IIM_STATM);
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writeb(0xfe, reg_base + IIM_ERR);
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/* unprotect fuse programing */
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writeb(0xaa, reg_base + IIM_PREG_P);
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/* upper half address register */
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writeb((bank << 3) | (row >> 5), reg_base + IIM_UA);
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for (bit = 0; bit < 8; bit++) {
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if (((value >> bit) & 1) == 0)
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continue;
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/* lower half address register */
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writeb(((row << 3) | bit), reg_base + IIM_LA);
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/* start fuse programing */
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writeb(0x71, reg_base + IIM_FCTL);
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/* wait for program done */
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while ((readb(reg_base + IIM_STAT) & 0x80) != 0)
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;
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/* clear program done status */
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stat = readb(reg_base + IIM_STAT);
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writeb(stat, reg_base + IIM_STAT);
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err = readb(reg_base + IIM_ERR);
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if (err) {
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printf("%s: bank %u, row %u, bit %d program error "
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"(0x%02x)\n", __func__, bank, row, bit,
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err);
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ret = -EIO;
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goto out;
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}
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}
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out:
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/* protect fuse programing */
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writeb(0, reg_base + IIM_PREG_P);
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return ret;
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}
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#endif /* CONFIG_IMX_IIM_FUSE_BLOW */
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static ssize_t imx_iim_cdev_write(struct cdev *cdev, const void *buf, size_t count,
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loff_t offset, ulong flags)
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{
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ulong size, i;
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struct iim_priv *priv = cdev->priv;
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const char *write_param;
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unsigned int blow_enable = 0;
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if ((write_param = dev_get_param(cdev->dev, "permanent_write_enable")))
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blow_enable = simple_strtoul(write_param, NULL, 0);
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size = min((loff_t)count, priv->banksize - offset);
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#ifdef CONFIG_IMX_IIM_FUSE_BLOW
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if (blow_enable) {
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for (i = 0; i < size; i++) {
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int ret;
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ret = do_fuse_blow(priv->base, priv->bank,
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offset + i, ((u8 *)buf)[i]);
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if (ret < 0)
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return ret;
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}
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} else
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#endif /* CONFIG_IMX_IIM_FUSE_BLOW */
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{
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for (i = 0; i < size; i++)
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((u8 *)priv->bankbase)[(offset+i)*4] = ((u8 *)buf)[i];
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}
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return size;
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}
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static struct file_operations imx_iim_ops = {
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.read = imx_iim_cdev_read,
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.write = imx_iim_cdev_write,
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.lseek = dev_lseek_default,
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};
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static int imx_iim_blow_enable_set(struct device_d *dev, struct param_d *param,
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const char *val)
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{
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unsigned long blow_enable;
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if (val == NULL)
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return -EINVAL;
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blow_enable = simple_strtoul(val, NULL, 0);
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if (blow_enable > 1)
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return -EINVAL;
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return dev_param_set_generic(dev, param, blow_enable ? "1" : "0");
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}
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static int imx_iim_add_bank(struct device_d *dev, void __iomem *base, int num)
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{
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struct iim_priv *priv;
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struct cdev *cdev;
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priv = xzalloc(sizeof (*priv));
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priv->base = base;
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priv->bankbase = priv->base + 0x800 + 0x400 * num;
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priv->bank = num;
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priv->banksize = 32;
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cdev = &priv->cdev;
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cdev->dev = dev;
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cdev->ops = &imx_iim_ops;
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cdev->priv = priv;
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cdev->size = 32;
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cdev->name = asprintf(DRIVERNAME "_bank%d", num);
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if (cdev->name == NULL)
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return -ENOMEM;
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return devfs_create(cdev);
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}
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static int imx_iim_probe(struct device_d *dev)
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{
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struct imx_iim_platform_data *pdata = dev->platform_data;
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int err;
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int i;
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void __iomem *base;
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base = dev_request_mem_region(dev, 0);
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if (pdata)
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mac_addr_base = pdata->mac_addr_base;
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for (i = 0; i < 8; i++) {
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imx_iim_add_bank(dev, base, i);
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}
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#ifdef CONFIG_IMX_IIM_FUSE_BLOW
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err = dev_add_param(dev, "permanent_write_enable",
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imx_iim_blow_enable_set, NULL, 0);
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if (err < 0)
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return err;
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err = dev_set_param(dev, "permanent_write_enable", "0");
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if (err < 0)
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return err;
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#endif /* CONFIG_IMX_IIM_FUSE_BLOW */
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err = dev_add_param(dev, "explicit_sense_enable",
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imx_iim_blow_enable_set, NULL, 0);
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if (err < 0)
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return err;
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err = dev_set_param(dev, "explicit_sense_enable", "1");
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if (err < 0)
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return err;
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return 0;
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}
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static struct driver_d imx_iim_driver = {
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.name = DRIVERNAME,
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.probe = imx_iim_probe,
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};
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static int imx_iim_init(void)
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{
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register_driver(&imx_iim_driver);
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return 0;
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}
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coredevice_initcall(imx_iim_init);
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int imx_iim_read(unsigned int bank, int offset, void *buf, int count)
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{
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struct cdev *cdev;
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char *name = asprintf(DRIVERNAME "_bank%d", bank);
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int ret;
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cdev = cdev_open(name, O_RDONLY);
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if (!cdev)
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return -ENODEV;
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ret = cdev_read(cdev, buf, count, offset, 0);
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cdev_close(cdev);
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free(name);
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return ret;
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}
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