Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
447 lines
11 KiB
C
447 lines
11 KiB
C
/*
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* (C) Copyright 2011 - Franck JULLIEN <elec4fun@gmail.com>
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*
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* This code was inspired from u-boot mmc_spi.c:
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* Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
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*
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* and linux mmc_spi.c:
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* (C) Copyright 2005, Intec Automation,
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* Mike Lavender (mike@steroidmicros)
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* (C) Copyright 2006-2007, David Brownell
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* (C) Copyright 2007, Axis Communications,
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* Hans-Peter Nilsson (hp@axis.com)
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* (C) Copyright 2007, ATRON electronic GmbH,
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* Jan Nikitenko <jan.nikitenko@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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*/
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#include <common.h>
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#include <init.h>
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#include <errno.h>
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#include <clock.h>
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#include <asm/io.h>
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#include <driver.h>
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#include <spi/spi.h>
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#include <mci.h>
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#include <crc.h>
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#include <crc7.h>
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#define to_spi_host(mci) container_of(mci, struct mmc_spi_host, mci)
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#define spi_setup(spi) spi->master->setup(spi)
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/* Response tokens used to ack each block written: */
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#define SPI_MMC_RESPONSE_CODE(x) ((x) & 0x1f)
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#define SPI_RESPONSE_ACCEPTED ((2 << 1)|1)
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/* Read and write blocks start with these tokens and end with crc;
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* on error, read tokens act like a subset of R2_SPI_* values.
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*/
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#define SPI_TOKEN_SINGLE 0xFE /* single block r/w, multiblock read */
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#define SPI_TOKEN_MULTI_WRITE 0xFC /* multiblock write */
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#define SPI_TOKEN_STOP_TRAN 0xFD /* terminate multiblock write */
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/* MMC SPI commands start with a start bit "0" and a transmit bit "1" */
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#define MMC_SPI_CMD(x) (0x40 | (x & 0x3F))
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#define MMC_SPI_BLOCKSIZE 512
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/* timeout value */
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#define CTOUT 8
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#define RTOUT 3000000 /* 1 sec */
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#define WTOUT 3000000 /* 1 sec */
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struct mmc_spi_host {
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struct mci_host mci;
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struct spi_device *spi;
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struct device_d *dev;
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/* for bulk data transfers */
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struct spi_transfer t_tx;
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struct spi_message m_tx;
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/* for status readback */
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struct spi_transfer t_rx;
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struct spi_message m_rx;
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void *ones;
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};
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static char *maptype(struct mci_cmd *cmd)
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{
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switch (cmd->resp_type) {
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case MMC_RSP_NONE: return "NONE";
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case MMC_RSP_R1: return "R1";
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case MMC_RSP_R1b: return "R1B";
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case MMC_RSP_R2: return "R2/R5";
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case MMC_RSP_R3: return "R3/R4/R7";
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default: return "?";
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}
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}
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static inline int mmc_cs_off(struct mmc_spi_host *host)
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{
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/* chipselect will always be inactive after setup() */
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return spi_setup(host->spi);
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}
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static int
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mmc_spi_readbytes(struct mmc_spi_host *host, unsigned len, void *data)
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{
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int status;
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host->t_rx.len = len;
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host->t_rx.rx_buf = data;
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status = spi_sync(host->spi, &host->m_rx);
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return status;
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}
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static int
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mmc_spi_writebytes(struct mmc_spi_host *host, unsigned len, void *data)
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{
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int status;
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host->t_tx.len = len;
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host->t_tx.tx_buf = data;
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status = spi_sync(host->spi, &host->m_tx);
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return status;
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}
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static int mmc_spi_command_send(struct mmc_spi_host *host, struct mci_cmd *cmd)
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{
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uint8_t r1;
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uint8_t command[7];
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int i;
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command[0] = 0xff;
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command[1] = MMC_SPI_CMD(cmd->cmdidx);
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command[2] = cmd->cmdarg >> 24;
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command[3] = cmd->cmdarg >> 16;
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command[4] = cmd->cmdarg >> 8;
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command[5] = cmd->cmdarg;
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command[6] = (crc7(0, &command[1], 5) << 1) | 0x01;
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mmc_spi_writebytes(host, 7, command);
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for (i = 0; i < CTOUT; i++) {
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mmc_spi_readbytes(host, 1, &r1);
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if (i && ((r1 & 0x80) == 0)) { /* r1 response */
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dev_dbg(host->dev, "%s: CMD%d, TRY %d, RESP %x\n", __func__, cmd->cmdidx, i, r1);
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break;
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}
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}
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return r1;
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}
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static uint mmc_spi_readdata(struct mmc_spi_host *host, void *xbuf,
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uint32_t bcnt, uint32_t bsize)
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{
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uint8_t *buf = xbuf;
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uint8_t r1;
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uint16_t crc;
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int i;
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while (bcnt--) {
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for (i = 0; i < RTOUT; i++) {
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mmc_spi_readbytes(host, 1, &r1);
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if (r1 != 0xff) /* data token */
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break;
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}
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if (r1 == SPI_TOKEN_SINGLE) {
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mmc_spi_readbytes(host, bsize, buf);
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mmc_spi_readbytes(host, 2, &crc);
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#ifdef CONFIG_MMC_SPI_CRC_ON
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if (be16_to_cpu(cyg_crc16(buf, bsize)) != crc) {
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dev_dbg(host->dev, "%s: CRC error\n", __func__);
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r1 = R1_SPI_COM_CRC;
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break;
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}
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#endif
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r1 = 0;
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} else {
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r1 = R1_SPI_ERROR;
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break;
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}
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buf += bsize;
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}
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return r1;
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}
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static uint mmc_spi_writedata(struct mmc_spi_host *host, const void *xbuf,
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uint32_t bcnt, uint32_t bsize, int multi)
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{
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const uint8_t *buf = xbuf;
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uint8_t r1;
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uint16_t crc = 0;
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uint8_t tok[2];
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int i;
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tok[0] = 0xff;
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tok[1] = multi ? SPI_TOKEN_MULTI_WRITE : SPI_TOKEN_SINGLE;
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while (bcnt--) {
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#ifdef CONFIG_MMC_SPI_CRC_ON
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crc = be16_to_cpu(cyg_crc16((u8 *)buf, bsize));
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#endif
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mmc_spi_writebytes(host, 2, tok);
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mmc_spi_writebytes(host, bsize, (void *)buf);
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mmc_spi_writebytes(host, 2, &crc);
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for (i = 0; i < CTOUT; i++) {
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mmc_spi_readbytes(host, 1, &r1);
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if ((r1 & 0x11) == 0x01) /* response token */
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break;
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}
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dev_dbg(host->dev,"%s : TOKEN%d RESP 0x%X\n", __func__, i, r1);
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if (SPI_MMC_RESPONSE_CODE(r1) == SPI_RESPONSE_ACCEPTED) {
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for (i = 0; i < WTOUT; i++) { /* wait busy */
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mmc_spi_readbytes(host, 1, &r1);
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if (i && r1 == 0xff) {
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r1 = 0;
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break;
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}
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}
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if (i == WTOUT) {
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dev_dbg(host->dev, "%s: wtout %x\n", __func__, r1);
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r1 = R1_SPI_ERROR;
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break;
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}
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} else {
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dev_dbg(host->dev, "%s: err %x\n", __func__, r1);
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r1 = R1_SPI_COM_CRC;
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break;
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}
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buf += bsize;
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}
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if (multi && bcnt == -1) { /* stop multi write */
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tok[1] = SPI_TOKEN_STOP_TRAN;
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mmc_spi_writebytes(host, 2, tok);
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for (i = 0; i < WTOUT; i++) { /* wait busy */
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mmc_spi_readbytes(host, 1, &r1);
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if (i && r1 == 0xff) {
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r1 = 0;
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break;
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}
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}
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if (i == WTOUT) {
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dev_dbg(host->dev, "%s: wstop %x\n", __func__, r1);
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r1 = R1_SPI_ERROR;
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}
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}
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return r1;
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}
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static int mmc_spi_request(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data)
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{
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struct mmc_spi_host *host = to_spi_host(mci);
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uint8_t r1;
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int i;
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int ret = 0;
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dev_dbg(host->dev, "%s : CMD%02d, RESP %s, ARG 0x%X\n", __func__,
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cmd->cmdidx, maptype(cmd), cmd->cmdarg);
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r1 = mmc_spi_command_send(host, cmd);
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cmd->response[0] = r1;
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if (r1 == 0xff) { /* no response */
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ret = -ETIME;
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goto done;
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} else if (r1 & R1_SPI_COM_CRC) {
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ret = -ECOMM;
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goto done;
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} else if (r1 & ~R1_SPI_IDLE) { /* other errors */
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ret = -ETIME;
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goto done;
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} else if (cmd->resp_type == MMC_RSP_R2) {
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r1 = mmc_spi_readdata(host, cmd->response, 1, 16);
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for (i = 0; i < 4; i++)
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cmd->response[i] = be32_to_cpu(cmd->response[i]);
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dev_dbg(host->dev, "MMC_RSP_R2 -> %x %x %x %x\n", cmd->response[0], cmd->response[1],
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cmd->response[2], cmd->response[3]);
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} else if (!data) {
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switch (cmd->cmdidx) {
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case SD_CMD_SEND_IF_COND:
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case MMC_CMD_SPI_READ_OCR:
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mmc_spi_readbytes(host, 4, cmd->response);
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cmd->response[0] = be32_to_cpu(cmd->response[0]);
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break;
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}
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} else {
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if (data->flags == MMC_DATA_READ) {
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dev_dbg(host->dev, "%s : DATA READ, %x blocks, bsize = 0x%X\n", __func__,
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data->blocks, data->blocksize);
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r1 = mmc_spi_readdata(host, data->dest,
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data->blocks, data->blocksize);
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} else if (data->flags == MMC_DATA_WRITE) {
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dev_dbg(host->dev, "%s : DATA WRITE, %x blocks, bsize = 0x%X\n", __func__,
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data->blocks, data->blocksize);
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r1 = mmc_spi_writedata(host, data->src,
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data->blocks, data->blocksize,
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(cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK));
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}
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if (r1 & R1_SPI_COM_CRC)
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ret = -ECOMM;
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else if (r1)
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ret = -ETIME;
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}
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done:
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mmc_cs_off(host);
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return ret;
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return 0;
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}
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static void mmc_spi_set_ios(struct mci_host *mci, struct mci_ios *ios)
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{
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struct mmc_spi_host *host = to_spi_host(mci);
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if (host->spi->max_speed_hz != ios->clock && ios->clock != 0) {
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int status;
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host->spi->max_speed_hz = ios->clock;
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status = spi_setup(host->spi);
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dev_dbg(&host->spi->dev,
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"mmc_spi: clock to %d Hz, %d\n",
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host->spi->max_speed_hz, status);
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}
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}
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static int mmc_spi_init(struct mci_host *mci, struct device_d *mci_dev)
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{
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struct mmc_spi_host *host = to_spi_host(mci);
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mmc_spi_readbytes(host, 10, NULL);
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/*
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* Do a burst with chipselect active-high. We need to do this to
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* meet the requirement of 74 clock cycles with both chipselect
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* and CMD (MOSI) high before CMD0 ... after the card has been
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* powered up to Vdd(min), and so is ready to take commands.
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*
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* Some cards are particularly needy of this (e.g. Viking "SD256")
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* while most others don't seem to care.
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*
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* Note that this is one of the places MMC/SD plays games with the
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* SPI protocol. Another is that when chipselect is released while
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* the card returns BUSY status, the clock must issue several cycles
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* with chipselect high before the card will stop driving its output.
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*/
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host->spi->mode |= SPI_CS_HIGH;
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if (spi_setup(host->spi) != 0) {
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/* Just warn; most cards work without it. */
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dev_warn(&host->spi->dev,
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"can't change chip-select polarity\n");
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host->spi->mode &= ~SPI_CS_HIGH;
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} else {
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mmc_spi_readbytes(host, 18, NULL);
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host->spi->mode &= ~SPI_CS_HIGH;
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if (spi_setup(host->spi) != 0) {
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/* Wot, we can't get the same setup we had before? */
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dev_err(&host->spi->dev,
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"can't restore chip-select polarity\n");
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}
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}
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return 0;
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}
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static int spi_mci_probe(struct device_d *dev)
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{
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struct spi_device *spi = (struct spi_device *)dev->type_data;
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struct mmc_spi_host *host;
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void *ones;
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int status;
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host = xzalloc(sizeof(*host));
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host->mci.send_cmd = mmc_spi_request;
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host->mci.set_ios = mmc_spi_set_ios;
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host->mci.init = mmc_spi_init;
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host->mci.hw_dev = dev;
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/* MMC and SD specs only seem to care that sampling is on the
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* rising edge ... meaning SPI modes 0 or 3. So either SPI mode
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* should be legit. We'll use mode 0 since the steady state is 0,
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* which is appropriate for hotplugging, unless the platform data
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* specify mode 3 (if hardware is not compatible to mode 0).
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*/
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if (spi->mode != SPI_MODE_3)
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spi->mode = SPI_MODE_0;
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spi->bits_per_word = 8;
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status = spi_setup(spi);
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if (status < 0) {
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dev_dbg(&spi->dev, "needs SPI mode %02x, %d KHz; %d\n",
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spi->mode, spi->max_speed_hz / 1000,
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status);
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return status;
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}
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/* SPI doesn't need the lowspeed device identification thing for
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* MMC or SD cards, since it never comes up in open drain mode.
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* That's good; some SPI masters can't handle very low speeds!
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*
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* However, low speed SDIO cards need not handle over 400 KHz;
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* that's the only reason not to use a few MHz for f_min (until
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* the upper layer reads the target frequency from the CSD).
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*/
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host->mci.f_min = 400000;
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host->mci.f_max = spi->max_speed_hz;
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host->dev = dev;
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host->spi = spi;
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dev->priv = host;
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ones = xmalloc(MMC_SPI_BLOCKSIZE);
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memset(ones, 0xff, MMC_SPI_BLOCKSIZE);
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host->ones = ones;
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spi_message_init(&host->m_tx);
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spi_message_init(&host->m_rx);
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spi_message_add_tail(&host->t_tx, &host->m_tx);
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spi_message_add_tail(&host->t_rx, &host->m_rx);
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host->t_rx.tx_buf = host->ones;
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host->t_rx.cs_change = 1;
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host->t_tx.cs_change = 1;
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host->mci.voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
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host->mci.host_caps = MMC_CAP_SPI;
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mci_register(&host->mci);
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return 0;
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}
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static struct driver_d spi_mci_driver = {
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.name = "spi_mci",
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.probe = spi_mci_probe,
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};
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device_spi_driver(spi_mci_driver);
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