For all users fix or add the error check. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
385 lines
9.3 KiB
C
385 lines
9.3 KiB
C
/*
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* PXA MCI driver
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*
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* Copyright (C) 2011 Robert Jarzmik
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Insprired by linux kernel driver
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*/
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#include <common.h>
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#include <errno.h>
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#include <io.h>
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#include <gpio.h>
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#include <clock.h>
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#include <init.h>
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#include <mci.h>
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#include <linux/err.h>
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#include <mach/clock.h>
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#include <mach/mci_pxa2xx.h>
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#include <mach/pxa-regs.h>
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#include "pxamci.h"
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#define DRIVER_NAME "pxa-mmc"
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#define RX_TIMEOUT (100 * MSECOND)
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#define TX_TIMEOUT (250 * MSECOND)
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#define CMD_TIMEOUT (100 * MSECOND)
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static void clk_enable(void)
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{
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CKEN |= CKEN_MMC;
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}
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static int pxamci_set_power(struct pxamci_host *host, int on)
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{
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mci_dbg("on=%d\n", on);
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if (host->pdata && host->pdata->gpio_power > 0)
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gpio_set_value(host->pdata->gpio_power,
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!!on ^ host->pdata->gpio_power_invert);
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else if (host->pdata && host->pdata->setpower)
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host->pdata->setpower(&host->mci, on);
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mdelay(250);
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return 0;
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}
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static void pxamci_start_clock(struct pxamci_host *host)
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{
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mmc_writel(START_CLOCK, MMC_STRPCL);
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}
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static void pxamci_stop_clock(struct pxamci_host *host)
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{
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uint64_t start = get_time_ns();
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unsigned stat;
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stat = mmc_readl(MMC_STAT);
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if (stat & STAT_CLK_EN)
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writel(STOP_CLOCK, host->base + MMC_STRPCL);
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while (!is_timeout(start, CMD_TIMEOUT) && stat & STAT_CLK_EN)
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stat = mmc_readl(MMC_STAT);
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if (stat & STAT_CLK_EN)
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mci_err("unable to stop clock\n");
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}
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static void pxamci_setup_data(struct pxamci_host *host, struct mci_data *data)
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{
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static const unsigned int timeout_ns = 1000 * MSECOND; /* 1000 ms */
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mci_dbg("nbblocks=%d, blocksize=%d\n", data->blocks, data->blocksize);
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mmc_writel(data->blocks, MMC_NOB);
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mmc_writel(data->blocksize, MMC_BLKLEN);
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mmc_writel(DIV_ROUND_UP(timeout_ns, 13128), MMC_RDTO);
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}
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static int pxamci_read_data(struct pxamci_host *host, unsigned char *dst,
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unsigned len)
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{
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int trf_len, trf_len1, trf_len4, ret = 0;
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uint64_t start;
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u32 *dst4;
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mci_dbg("dst=%p, len=%u\n", dst, len);
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while (!ret && len > 0) {
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trf_len = min_t(int, len, MMC_FIFO_LENGTH);
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for (start = get_time_ns(), ret = -ETIMEDOUT;
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ret && !is_timeout(start, RX_TIMEOUT);)
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if (mmc_readl(MMC_I_REG) & RXFIFO_RD_REQ)
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ret = 0;
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trf_len1 = trf_len % 4;
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trf_len4 = trf_len / 4;
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for (dst4 = (u32 *)dst; !ret && trf_len4 > 0; trf_len4--)
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*dst4++ = mmc_readl(MMC_RXFIFO);
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for (dst = (u8 *)dst4; !ret && trf_len1 > 0; trf_len1--)
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*dst++ = mmc_readb(MMC_RXFIFO);
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len -= trf_len;
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}
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if (!ret)
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for (start = get_time_ns(), ret = -ETIMEDOUT;
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ret && !is_timeout(start, RX_TIMEOUT);)
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if (mmc_readl(MMC_STAT) & STAT_DATA_TRAN_DONE)
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ret = 0;
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mci_dbg("ret=%d, remain=%d, stat=%x, mmc_i_reg=%x\n",
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ret, len, mmc_readl(MMC_STAT), mmc_readl(MMC_I_REG));
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return ret;
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}
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static int pxamci_write_data(struct pxamci_host *host, const unsigned char *src,
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unsigned len)
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{
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uint64_t start;
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int trf_len, partial = 0, ret = 0;
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unsigned stat;
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mci_dbg("src=%p, len=%u\n", src, len);
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while (!ret && len > 0) {
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trf_len = min_t(int, len, MMC_FIFO_LENGTH);
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partial = trf_len < MMC_FIFO_LENGTH;
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for (start = get_time_ns(), ret = -ETIMEDOUT;
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ret && !is_timeout(start, TX_TIMEOUT);)
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if (mmc_readl(MMC_I_REG) & TXFIFO_WR_REQ)
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ret = 0;
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for (; !ret && trf_len > 0; trf_len--, len--)
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mmc_writeb(*src++, MMC_TXFIFO);
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if (partial)
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mmc_writeb(BUF_PART_FULL, MMC_PRTBUF);
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}
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if (!ret)
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for (start = get_time_ns(), ret = -ETIMEDOUT;
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ret && !is_timeout(start, TX_TIMEOUT);) {
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stat = mmc_readl(MMC_STAT);
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stat &= STAT_DATA_TRAN_DONE | STAT_PRG_DONE;
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if (stat == (STAT_DATA_TRAN_DONE | STAT_PRG_DONE))
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ret = 0;
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}
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mci_dbg("ret=%d, remain=%d, stat=%x, mmc_i_reg=%x\n",
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ret, len, mmc_readl(MMC_STAT), mmc_readl(MMC_I_REG));
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return ret;
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}
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static int pxamci_transfer_data(struct pxamci_host *host,
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struct mci_data *data)
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{
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int nbbytes = data->blocks * data->blocksize;
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int ret;
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unsigned err_mask = STAT_CRC_READ_ERROR | STAT_CRC_WRITE_ERROR |
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STAT_READ_TIME_OUT;
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if (data->flags & MMC_DATA_WRITE)
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ret = pxamci_write_data(host, data->src, nbbytes);
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else
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ret = pxamci_read_data(host, data->dest, nbbytes);
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if (!ret && (mmc_readl(MMC_STAT) & err_mask))
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ret = -EILSEQ;
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return ret;
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}
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#define MMC_RSP_MASK (MMC_RSP_PRESENT | MMC_RSP_136 | MMC_RSP_CRC | \
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MMC_RSP_BUSY | MMC_RSP_OPCODE)
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static void pxamci_start_cmd(struct pxamci_host *host, struct mci_cmd *cmd,
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unsigned int cmdat)
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{
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mci_dbg("cmd=(idx=%d,type=%d,clkrt=%d)\n", cmd->cmdidx, cmd->resp_type,
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host->clkrt);
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switch (cmd->resp_type & MMC_RSP_MASK) {
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/* r1, r1b, r6, r7 */
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case MMC_RSP_R1b:
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cmdat |= CMDAT_BUSY;
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case MMC_RSP_R1:
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cmdat |= CMDAT_RESP_SHORT;
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break;
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case MMC_RSP_R2:
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cmdat |= CMDAT_RESP_R2;
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break;
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case MMC_RSP_R3:
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cmdat |= CMDAT_RESP_R3;
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break;
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default:
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break;
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}
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if (cmd->cmdidx == MMC_CMD_STOP_TRANSMISSION)
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cmdat |= CMDAT_STOP_TRAN;
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mmc_writel(cmd->cmdidx, MMC_CMD);
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mmc_writel(cmd->cmdarg >> 16, MMC_ARGH);
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mmc_writel(cmd->cmdarg & 0xffff, MMC_ARGL);
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pxamci_start_clock(host);
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mmc_writel(cmdat, MMC_CMDAT);
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}
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static int pxamci_cmd_response(struct pxamci_host *host, struct mci_cmd *cmd)
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{
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unsigned v, stat;
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int i;
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/*
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* Did I mention this is Sick. We always need to
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* discard the upper 8 bits of the first 16-bit word.
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*/
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v = mmc_readl(MMC_RES) & 0xffff;
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for (i = 0; i < 4; i++) {
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u32 w1 = mmc_readl(MMC_RES) & 0xffff;
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u32 w2 = mmc_readl(MMC_RES) & 0xffff;
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cmd->response[i] = v << 24 | w1 << 8 | w2 >> 8;
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v = w2;
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}
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stat = mmc_readl(MMC_STAT);
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if (stat & STAT_TIME_OUT_RESPONSE)
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return -ETIMEDOUT;
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if (stat & STAT_RES_CRC_ERR && cmd->resp_type & MMC_RSP_CRC) {
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/*
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* workaround for erratum #42:
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* Intel PXA27x Family Processor Specification Update Rev 001
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* A bogus CRC error can appear if the msb of a 136 bit
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* response is a one.
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*/
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if (cpu_is_pxa27x() && cmd->resp_type & MMC_RSP_136 &&
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cmd->response[0] & 0x80000000)
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pr_debug("ignoring CRC from command %d - *risky*\n",
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cmd->cmdidx);
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else
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return -EILSEQ;
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}
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return 0;
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}
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static int pxamci_mmccmd(struct pxamci_host *host, struct mci_cmd *cmd,
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struct mci_data *data, unsigned int cmddat)
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{
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int ret = 0, stat_mask;
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uint64_t start;
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pxamci_start_cmd(host, cmd, cmddat);
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stat_mask = STAT_END_CMD_RES;
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if (cmd->resp_type & MMC_RSP_BUSY)
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stat_mask |= STAT_PRG_DONE;
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for (start = get_time_ns(), ret = -ETIMEDOUT;
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ret && !is_timeout(start, CMD_TIMEOUT);)
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if ((mmc_readl(MMC_STAT) & stat_mask) == stat_mask)
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ret = 0;
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if (!ret && data)
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ret = pxamci_transfer_data(host, data);
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if (!ret)
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ret = pxamci_cmd_response(host, cmd);
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return ret;
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}
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static int pxamci_request(struct mci_host *mci, struct mci_cmd *cmd,
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struct mci_data *data)
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{
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struct pxamci_host *host = to_pxamci(mci);
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unsigned int cmdat;
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int ret;
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cmdat = host->cmdat;
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host->cmdat &= ~CMDAT_INIT;
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if (data) {
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pxamci_setup_data(host, data);
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cmdat &= ~CMDAT_BUSY;
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cmdat |= CMDAT_DATAEN;
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if (data->flags & MMC_DATA_WRITE)
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cmdat |= CMDAT_WRITE;
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}
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ret = pxamci_mmccmd(host, cmd, data, cmdat);
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return ret;
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}
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static void pxamci_set_ios(struct mci_host *mci, struct mci_ios *ios)
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{
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struct pxamci_host *host = to_pxamci(mci);
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unsigned int clk_in = pxa_get_mmcclk();
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int fact;
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mci_dbg("bus_width=%d, clock=%u\n", ios->bus_width, ios->clock);
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if (ios->clock)
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fact = min_t(int, clk_in / ios->clock, 1 << 6);
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else
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fact = 1 << 6;
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fact = max_t(int, fact, 1);
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/*
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* We calculate clkrt here, and will write it on the next command
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* MMC card clock = mmcclk / (2 ^ clkrt)
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*/
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/* to handle (19.5MHz, 26MHz) */
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host->clkrt = fls(fact) - 1;
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switch (ios->bus_width) {
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case MMC_BUS_WIDTH_4:
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host->cmdat |= CMDAT_SD_4DAT;
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break;
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case MMC_BUS_WIDTH_1:
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host->cmdat &= ~CMDAT_SD_4DAT;
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break;
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default:
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return;
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}
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host->cmdat |= CMDAT_INIT;
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pxamci_set_power(host, 1);
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pxamci_stop_clock(host);
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mmc_writel(host->clkrt, MMC_CLKRT);
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}
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static int pxamci_init(struct mci_host *mci, struct device_d *dev)
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{
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struct pxamci_host *host = to_pxamci(mci);
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if (host->pdata && host->pdata->init)
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return host->pdata->init(mci, dev);
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return 0;
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}
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static int pxamci_probe(struct device_d *dev)
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{
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struct pxamci_host *host;
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int gpio_power = -1;
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clk_enable();
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host = xzalloc(sizeof(*host));
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host->base = dev_request_mem_region(dev, 0);
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if (IS_ERR(host->base))
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return PTR_ERR(host->base);
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host->mci.init = pxamci_init;
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host->mci.send_cmd = pxamci_request;
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host->mci.set_ios = pxamci_set_ios;
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host->mci.host_caps = MMC_CAP_4_BIT_DATA;
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host->mci.hw_dev = dev;
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host->mci.voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
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/*
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* Calculate minimum clock rate, rounding up.
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*/
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host->mci.f_min = pxa_get_mmcclk() >> 6;
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host->mci.f_max = pxa_get_mmcclk();
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/*
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* Ensure that the host controller is shut down, and setup
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* with our defaults.
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*/
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pxamci_stop_clock(host);
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mmc_writel(0, MMC_SPI);
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mmc_writel(64, MMC_RESTO);
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mmc_writel(0, MMC_I_MASK);
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host->pdata = dev->platform_data;
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if (host->pdata)
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gpio_power = host->pdata->gpio_power;
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if (gpio_power > 0)
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gpio_direction_output(gpio_power,
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host->pdata->gpio_power_invert);
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mci_register(&host->mci);
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return 0;
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}
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static struct driver_d pxamci_driver = {
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.name = DRIVER_NAME,
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.probe = pxamci_probe,
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};
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device_platform_driver(pxamci_driver);
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