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barebox/arch/ppc
Renaud Barbier 89cdacb0cb P2020RDB: map boot flash.
The chip select 0 (boot flash) registers are updated by the board
specific code as it is not done by the cpu early initialisation
any more.

Signed-off-by: Renaud Barbier <renaud.barbier@ge.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2013-08-05 12:09:22 +02:00
..
boards P2020RDB: map boot flash. 2013-08-05 12:09:22 +02:00
configs P2020RDB: update build configuration 2013-06-25 22:16:56 +02:00
cpu-85xx mpc85xx: remove local bus initialisation 2013-08-05 12:09:22 +02:00
ddr-8xxx ppc ddr-8xxx: misplaced parenthesis 2013-07-22 08:40:53 +02:00
include/asm mpc85xx: remove local bus initialisation 2013-08-05 12:09:22 +02:00
lib bootm: Pass unflattened devicetree to handlers 2013-03-06 11:41:29 +01:00
mach-mpc5xxx OF: base: sync of_find_node_by_path with linux OF API 2013-06-20 21:20:50 +02:00
mach-mpc85xx mpc85xx: remove local bus initialisation 2013-08-05 12:09:22 +02:00
Kconfig bootm: Pass unflattened devicetree to handlers 2013-03-06 11:41:29 +01:00
Makefile Minimal P2020RDB platform support and configuration file 2012-05-17 20:33:39 +02:00
mach-ppc.dox rename U-Boot-v2 project to barebox 2009-12-15 10:18:30 +01:00