so we can specify the devname in the board Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
624 lines
14 KiB
C
624 lines
14 KiB
C
/*
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* Atmel MCI driver
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*
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* Copyright (C) 2011 Hubert Feurstein <h.feurstein@gmail.com>
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*
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* based on imx.c by:
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* Copyright (C) 2009 Ilya Yanok, <yanok@emcraft.com>
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* Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
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* Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <common.h>
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#include <init.h>
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#include <mci.h>
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#include <errno.h>
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#include <clock.h>
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#include <gpio.h>
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#include <io.h>
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#include <mach/board.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include "atmel-mci-regs.h"
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struct atmel_mci_caps {
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bool has_cfg_reg;
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bool has_highspeed;
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bool has_rwproof;
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bool has_odd_clk_div;
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bool need_reset_after_xfer;
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};
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struct atmel_mci {
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struct mci_host mci;
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void __iomem *regs;
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struct device_d *hw_dev;
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struct clk *clk;
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u32 datasize;
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struct mci_cmd *cmd;
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struct mci_data *data;
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unsigned slot_b;
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int version;
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struct atmel_mci_caps caps;
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unsigned long bus_hz;
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u32 mode_reg;
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u32 cfg_reg;
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u32 sdc_reg;
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bool need_reset;
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};
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#define to_mci_host(mci) container_of(mci, struct atmel_mci, mci)
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#define STATUS_ERROR_MASK (ATMCI_RINDE \
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| ATMCI_RDIRE \
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| ATMCI_RCRCE \
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| ATMCI_RENDE \
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| ATMCI_RTOE \
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| ATMCI_DCRCE \
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| ATMCI_DTOE \
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| ATMCI_OVRE \
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| ATMCI_UNRE)
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static void atmci_set_clk_rate(struct atmel_mci *host,
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unsigned int clock_min)
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{
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unsigned int clkdiv;
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if (!host->mode_reg) {
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clk_enable(host->clk);
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atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
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if (host->caps.has_cfg_reg)
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atmci_writel(host, ATMCI_CFG, host->cfg_reg);
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}
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if (host->caps.has_odd_clk_div) {
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clkdiv = DIV_ROUND_UP(host->bus_hz, clock_min) - 2;
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if (clkdiv > 511) {
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dev_dbg(host->hw_dev,
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"clock %u too slow; using %lu\n",
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clock_min, host->bus_hz / (511 + 2));
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clkdiv = 511;
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}
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host->mode_reg = ATMCI_MR_CLKDIV(clkdiv >> 1)
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| ATMCI_MR_CLKODD(clkdiv & 1);
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} else {
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clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
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if (clkdiv > 255) {
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dev_dbg(host->hw_dev,
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"clock %u too slow; using %lu\n",
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clock_min, host->bus_hz / (2 * 256));
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clkdiv = 255;
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}
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host->mode_reg = ATMCI_MR_CLKDIV(clkdiv);
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}
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dev_dbg(host->hw_dev, "atmel_set_clk_rate: clkIn=%ld clkIos=%d divider=%d\n",
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host->bus_hz, clock_min, clkdiv);
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/*
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* WRPROOF and RDPROOF prevent overruns/underruns by
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* stopping the clock when the FIFO is full/empty.
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* This state is not expected to last for long.
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*/
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if (host->caps.has_rwproof)
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host->mode_reg |= ATMCI_MR_RDPROOF | ATMCI_MR_WRPROOF;
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atmci_writel(host, ATMCI_MR, host->mode_reg);
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}
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static int atmci_poll_status(struct atmel_mci *host, u32 mask)
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{
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u32 stat;
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uint64_t start = get_time_ns();
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do {
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stat = atmci_readl(host, ATMCI_SR);
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if (stat & STATUS_ERROR_MASK)
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return stat;
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if (is_timeout(start, SECOND)) {
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dev_err(host->hw_dev, "timeout\n");
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host->need_reset = true;
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return ATMCI_RTOE | stat;
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}
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if (stat & mask)
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return 0;
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} while (1);
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}
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static int atmci_pull(struct atmel_mci *host, void *_buf, int bytes)
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{
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unsigned int stat;
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u32 *buf = _buf;
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while (bytes > 3) {
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stat = atmci_poll_status(host, ATMCI_RXRDY);
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if (stat)
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return stat;
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*buf++ = atmci_readl(host, ATMCI_RDR);
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bytes -= 4;
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}
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if (WARN_ON(bytes))
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return -EIO;
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return 0;
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}
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#ifdef CONFIG_MCI_WRITE
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static int atmci_push(struct atmel_mci *host, const void *_buf, int bytes)
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{
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unsigned int stat;
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const u32 *buf = _buf;
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while (bytes > 3) {
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stat = atmci_poll_status(host, ATMCI_TXRDY);
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if (stat)
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return stat;
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atmci_writel(host, ATMCI_TDR, *buf++);
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bytes -= 4;
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}
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stat = atmci_poll_status(host, ATMCI_TXRDY);
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if (stat)
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return stat;
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if (WARN_ON(bytes))
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return -EIO;
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return 0;
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}
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#endif /* CONFIG_MCI_WRITE */
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static int atmci_transfer_data(struct atmel_mci *host)
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{
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struct mci_data *data = host->data;
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int stat;
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unsigned long length;
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length = data->blocks * data->blocksize;
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host->datasize = 0;
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if (data->flags & MMC_DATA_READ) {
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stat = atmci_pull(host, data->dest, length);
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if (stat)
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return stat;
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stat = atmci_poll_status(host, ATMCI_NOTBUSY);
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if (stat)
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return stat;
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host->datasize += length;
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} else {
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#ifdef CONFIG_MCI_WRITE
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stat = atmci_push(host, (const void *)(data->src), length);
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if (stat)
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return stat;
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host->datasize += length;
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stat = atmci_poll_status(host, ATMCI_NOTBUSY);
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if (stat)
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return stat;
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#endif /* CONFIG_MCI_WRITE */
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}
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return 0;
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}
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static void atmci_finish_request(struct atmel_mci *host)
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{
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host->cmd = NULL;
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host->data = NULL;
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}
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static int atmci_finish_data(struct atmel_mci *host, unsigned int stat)
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{
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int data_error = 0;
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if (stat & STATUS_ERROR_MASK) {
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dev_err(host->hw_dev, "request failed (status=0x%08x)\n", stat);
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if (stat & ATMCI_DCRCE)
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data_error = -EILSEQ;
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else if (stat & (ATMCI_RTOE | ATMCI_DTOE))
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data_error = -ETIMEDOUT;
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else
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data_error = -EIO;
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}
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host->data = NULL;
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return data_error;
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}
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static void atmci_setup_data(struct atmel_mci *host, struct mci_data *data)
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{
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unsigned int nob = data->blocks;
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unsigned int blksz = data->blocksize;
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unsigned int datasize = nob * blksz;
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BUG_ON(data->blocksize & 3);
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BUG_ON(nob == 0);
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host->data = data;
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dev_dbg(host->hw_dev, "atmel_setup_data: nob=%d blksz=%d\n",
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nob, blksz);
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atmci_writel(host, ATMCI_BLKR, ATMCI_BCNT(nob)
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| ATMCI_BLKLEN(blksz));
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host->datasize = datasize;
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}
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static int atmci_read_response(struct atmel_mci *host, unsigned int stat)
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{
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struct mci_cmd *cmd = host->cmd;
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int i;
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u32 *resp;
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if (!cmd)
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return 0;
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resp = (u32 *)cmd->response;
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if (stat & (ATMCI_RTOE | ATMCI_DTOE)) {
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dev_err(host->hw_dev, "command/data timeout\n");
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return -ETIMEDOUT;
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} else if ((stat & ATMCI_RCRCE) && (cmd->resp_type & MMC_RSP_CRC)) {
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dev_err(host->hw_dev, "cmd crc error\n");
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return -EILSEQ;
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}
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if (cmd->resp_type & MMC_RSP_PRESENT) {
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if (cmd->resp_type & MMC_RSP_136) {
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for (i = 0; i < 4; i++)
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resp[i] = atmci_readl(host, ATMCI_RSPR);
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} else {
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resp[0] = atmci_readl(host, ATMCI_RSPR);
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}
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}
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return 0;
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}
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static int atmci_cmd_done(struct atmel_mci *host, unsigned int stat)
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{
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int datastat;
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int ret;
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ret = atmci_read_response(host, stat);
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if (ret) {
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atmci_finish_request(host);
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return ret;
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}
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if (!host->data) {
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atmci_finish_request(host);
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return 0;
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}
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datastat = atmci_transfer_data(host);
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ret = atmci_finish_data(host, datastat);
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atmci_finish_request(host);
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return ret;
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}
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static int atmci_start_cmd(struct atmel_mci *host, struct mci_cmd *cmd,
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unsigned int cmdat)
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{
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unsigned flags = 0;
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unsigned cmdval = 0;
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if (host->cmd != NULL)
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dev_err(host->hw_dev, "error!\n");
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if ((atmci_readl(host, ATMCI_SR) & ATMCI_CMDRDY) == 0) {
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dev_err(host->hw_dev, "mci not ready!\n");
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return -EBUSY;
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}
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host->cmd = cmd;
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cmdval = ATMCI_CMDR_CMDNB_MASK & cmd->cmdidx;
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switch (cmd->resp_type) {
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case MMC_RSP_R1: /* short CRC, OPCODE */
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case MMC_RSP_R1b:/* short CRC, OPCODE, BUSY */
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flags |= ATMCI_CMDR_RSPTYP_48BIT;
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break;
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case MMC_RSP_R2: /* long 136 bit + CRC */
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flags |= ATMCI_CMDR_RSPTYP_136BIT;
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break;
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case MMC_RSP_R3: /* short */
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flags |= ATMCI_CMDR_RSPTYP_48BIT;
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break;
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case MMC_RSP_NONE:
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flags |= ATMCI_CMDR_RSPTYP_NONE;
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break;
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default:
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dev_err(host->hw_dev, "unhandled response type 0x%x\n",
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cmd->resp_type);
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return -EINVAL;
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}
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cmdval |= ATMCI_CMDR_RSPTYP & flags;
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cmdval |= cmdat & ~(ATMCI_CMDR_CMDNB_MASK | ATMCI_CMDR_RSPTYP);
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atmci_writel(host, ATMCI_ARGR, cmd->cmdarg);
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atmci_writel(host, ATMCI_CMDR, cmdval);
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return 0;
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}
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static int atmci_card_present(struct mci_host *mci)
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{
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struct atmel_mci *host = to_mci_host(mci);
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struct atmel_mci_platform_data *pd = host->hw_dev->platform_data;
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int ret;
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/* No gpio, assume card is present */
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if (!gpio_is_valid(pd->detect_pin))
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return 1;
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ret = gpio_get_value(pd->detect_pin);
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return ret == 0 ? 1 : 0;
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}
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/** init the host interface */
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static int atmci_reset(struct mci_host *mci, struct device_d *mci_dev)
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{
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struct atmel_mci *host = to_mci_host(mci);
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clk_enable(host->clk);
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atmci_writel(host, ATMCI_DTOR, 0x7f);
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clk_disable(host->clk);
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return 0;
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}
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/** change host interface settings */
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static void atmci_set_ios(struct mci_host *mci, struct mci_ios *ios)
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{
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struct atmel_mci *host = to_mci_host(mci);
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dev_dbg(host->hw_dev, "atmel_mci_set_ios: bus_width=%d clk=%d\n",
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ios->bus_width, ios->clock);
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host->sdc_reg &= ~ATMCI_SDCBUS_MASK;
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switch (ios->bus_width) {
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case MMC_BUS_WIDTH_4:
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host->sdc_reg |= ATMCI_SDCBUS_4BIT;
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break;
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case MMC_BUS_WIDTH_8:
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host->sdc_reg |= ATMCI_SDCBUS_8BIT;
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break;
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case MMC_BUS_WIDTH_1:
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host->sdc_reg |= ATMCI_SDCBUS_1BIT;
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break;
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default:
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return;
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}
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if (ios->clock) {
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atmci_set_clk_rate(host, ios->clock);
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if (host->caps.has_cfg_reg) {
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/* setup High Speed mode in relation with card capacity */
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if (ios->timing == MMC_TIMING_SD_HS)
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host->cfg_reg |= ATMCI_CFG_HSMODE;
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else
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host->cfg_reg &= ~ATMCI_CFG_HSMODE;
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atmci_writel(host, ATMCI_CFG, host->cfg_reg);
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}
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} else {
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atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS);
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if (host->mode_reg) {
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atmci_readl(host, ATMCI_MR);
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clk_disable(host->clk);
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}
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host->mode_reg = 0;
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}
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return;
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}
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/** handle a command */
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static int atmci_request(struct mci_host *mci, struct mci_cmd *cmd, struct mci_data *data)
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{
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struct atmel_mci *host = to_mci_host(mci);
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u32 stat, cmdat = 0;
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int ret;
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if (host->need_reset || host->caps.need_reset_after_xfer) {
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atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
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atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN);
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atmci_writel(host, ATMCI_MR, host->mode_reg);
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if (host->caps.has_cfg_reg)
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atmci_writel(host, ATMCI_CFG, host->cfg_reg);
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host->need_reset = false;
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}
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atmci_writel(host, ATMCI_SDCR, host->sdc_reg);
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if (cmd->resp_type != MMC_RSP_NONE)
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cmdat |= ATMCI_CMDR_MAXLAT_64CYC;
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if (data) {
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atmci_setup_data(host, data);
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cmdat |= ATMCI_CMDR_START_XFER | ATMCI_CMDR_MULTI_BLOCK;
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if (data->flags & MMC_DATA_READ)
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cmdat |= ATMCI_CMDR_TRDIR_READ;
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}
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ret = atmci_start_cmd(host, cmd, cmdat);
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if (ret) {
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atmci_finish_request(host);
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return ret;
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}
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stat = atmci_poll_status(host, ATMCI_CMDRDY);
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return atmci_cmd_done(host, stat);
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}
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static void atmci_info(struct device_d *mci_dev)
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{
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struct atmel_mci *host = mci_dev->priv;
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struct atmel_mci_platform_data *pd = host->hw_dev->platform_data;
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printf(" Bus data width: %d bit\n", host->mci.bus_width);
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printf(" Bus frequency: %u Hz\n", host->mci.clock);
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printf(" Frequency limits: ");
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if (host->mci.f_min == 0)
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printf("no lower limit ");
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else
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printf("%u Hz lower limit ", host->mci.f_min);
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if (host->mci.f_max == 0)
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printf("- no upper limit");
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else
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printf("- %u Hz upper limit", host->mci.f_max);
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printf("\n Card detection support: %s\n",
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gpio_is_valid(pd->detect_pin) ? "yes" : "no");
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}
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/*
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* HSMCI (High Speed MCI) module is not fully compatible with MCI module.
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* HSMCI provides DMA support and a new config register but no more supports
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* PDC.
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*/
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static void atmci_get_cap(struct atmel_mci *host)
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{
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unsigned int version;
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version = atmci_readl(host, ATMCI_VERSION) & 0x00000fff;
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host->version = version;
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dev_info(host->hw_dev, "version: 0x%x\n", version);
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host->caps.has_cfg_reg = 0;
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host->caps.has_highspeed = 0;
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host->caps.need_reset_after_xfer = 1;
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switch (version & 0xf00) {
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case 0x500:
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host->caps.has_odd_clk_div = 1;
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case 0x400:
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case 0x300:
|
|
host->caps.has_cfg_reg = 1;
|
|
host->caps.has_highspeed = 1;
|
|
case 0x200:
|
|
host->caps.has_rwproof = 1;
|
|
case 0x100:
|
|
host->caps.need_reset_after_xfer = 0;
|
|
case 0x0:
|
|
break;
|
|
default:
|
|
dev_warn(host->hw_dev,
|
|
"Unmanaged mci version, set minimum capabilities\n");
|
|
break;
|
|
}
|
|
}
|
|
|
|
static int atmci_probe(struct device_d *hw_dev)
|
|
{
|
|
struct atmel_mci *host;
|
|
struct atmel_mci_platform_data *pd = hw_dev->platform_data;
|
|
int ret;
|
|
|
|
if (!pd) {
|
|
dev_err(hw_dev, "missing platform data\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (gpio_is_valid(pd->detect_pin)) {
|
|
ret = gpio_request(pd->detect_pin, "mci_cd");
|
|
if (ret) {
|
|
dev_err(hw_dev, "Impossible to request CD gpio %d (%d)\n",
|
|
ret, pd->detect_pin);
|
|
return ret;
|
|
}
|
|
|
|
ret = gpio_direction_input(pd->detect_pin);
|
|
if (ret) {
|
|
dev_err(hw_dev, "Impossible to configure CD gpio %d as input (%d)\n",
|
|
ret, pd->detect_pin);
|
|
goto err_gpio_cd_request;
|
|
}
|
|
}
|
|
|
|
host = xzalloc(sizeof(*host));
|
|
host->mci.send_cmd = atmci_request;
|
|
host->mci.set_ios = atmci_set_ios;
|
|
host->mci.init = atmci_reset;
|
|
host->mci.card_present = atmci_card_present;
|
|
host->mci.hw_dev = hw_dev;
|
|
host->mci.devname = pd->devname;
|
|
|
|
if (pd->bus_width >= 4)
|
|
host->mci.host_caps |= MMC_CAP_4_BIT_DATA;
|
|
if (pd->bus_width == 8)
|
|
host->mci.host_caps |= MMC_CAP_8_BIT_DATA;
|
|
host->slot_b = pd->slot_b;
|
|
|
|
host->regs = dev_request_mem_region(hw_dev, 0);
|
|
host->hw_dev = hw_dev;
|
|
hw_dev->priv = host;
|
|
host->clk = clk_get(hw_dev, "mci_clk");
|
|
if (IS_ERR(host->clk)) {
|
|
dev_err(hw_dev, "no mci_clk\n");
|
|
ret = PTR_ERR(host->clk);
|
|
goto err_gpio_cd_request;
|
|
}
|
|
|
|
clk_enable(host->clk);
|
|
atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST);
|
|
atmci_writel(host, ATMCI_IDR, ~0UL);
|
|
host->bus_hz = clk_get_rate(host->clk);
|
|
clk_disable(host->clk);
|
|
|
|
host->mci.voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
|
|
|
|
host->mci.f_min = DIV_ROUND_UP(host->bus_hz, 512);
|
|
host->mci.f_max = host->bus_hz >> 1;
|
|
|
|
atmci_get_cap(host);
|
|
|
|
if (host->caps.has_highspeed)
|
|
host->mci.host_caps |= MMC_CAP_SD_HIGHSPEED;
|
|
|
|
if (host->slot_b)
|
|
host->sdc_reg = ATMCI_SDCSEL_SLOT_B;
|
|
else
|
|
host->sdc_reg = ATMCI_SDCSEL_SLOT_A;
|
|
|
|
if (IS_ENABLED(CONFIG_MCI_INFO))
|
|
hw_dev->info = atmci_info;
|
|
|
|
mci_register(&host->mci);
|
|
|
|
return 0;
|
|
|
|
err_gpio_cd_request:
|
|
if (gpio_is_valid(pd->detect_pin))
|
|
gpio_free(pd->detect_pin);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static struct driver_d atmci_driver = {
|
|
.name = "atmel_mci",
|
|
.probe = atmci_probe,
|
|
};
|
|
device_platform_driver(atmci_driver);
|