dev_request_mem_region doesn't work properly one some SoCs on which PTR_ERR() values clash with valid return values from dev_request_mem_region. Replace them with dev_request_mem_resource where possible. This patch has been generated with the following semantic patch: // <smpl> @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { ... - return PTR_ERR(io); -} + return PTR_ERR(iores); +} +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) - return PTR_ERR(io); -} + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); -if (IS_ERR(io)) { - ret = PTR_ERR(io); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) { + ret = PTR_ERR(iores); ... } +io = IOMEM(iores->start); ...+> } @@ expression d; expression n; expression io; identifier func; @@ func(...) { +struct resource *iores; <+... -io = dev_request_mem_region(d, n); +iores = dev_request_mem_resource(d, n); +if (IS_ERR(iores)) + return PTR_ERR(iores); +io = IOMEM(iores->start); ...+> } @@ identifier func; @@ func(...) { <+... struct resource *iores; -struct resource *iores; ...+> } // </smpl> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
206 lines
5.2 KiB
C
206 lines
5.2 KiB
C
/*
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* linux/arch/arm/mach-at91/sam9_smc.c
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*
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* Copyright (C) 2008 Andrew Victor
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <common.h>
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#include <init.h>
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#include <io.h>
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#include <mach/hardware.h>
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#include <mach/cpu.h>
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#include <mach/io.h>
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#include <linux/err.h>
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#include <mach/at91sam9_smc.h>
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#define AT91_SAM9_SMC_CS_STRIDE 0x10
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#define AT91_SAMA5_SMC_CS_STRIDE 0x14
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#define AT91_SMC_CS_STRIDE ((at91_soc_initdata.type == AT91_SOC_SAMA5D3 \
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|| at91_soc_initdata.type == AT91_SOC_SAMA5D4) \
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? AT91_SAMA5_SMC_CS_STRIDE : AT91_SAM9_SMC_CS_STRIDE)
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#define AT91_SMC_CS(id, n) (smc_base_addr[id] + ((n) * AT91_SMC_CS_STRIDE))
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static void __iomem *smc_base_addr[2];
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static void sam9_smc_cs_write_mode(void __iomem *base,
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struct sam9_smc_config *config)
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{
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void __iomem *mode_reg;
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switch (at91_soc_initdata.type) {
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case AT91_SOC_SAMA5D3:
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case AT91_SOC_SAMA5D4:
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mode_reg = base + AT91_SAMA5_SMC_MODE;
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break;
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default:
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mode_reg = base + AT91_SAM9_SMC_MODE;
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break;
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}
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__raw_writel(config->mode
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| AT91_SMC_TDF_(config->tdf_cycles),
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mode_reg);
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}
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static void sam9_smc_cs_write_timings(void __iomem *base,
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struct sam9_smc_config *config)
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{
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__raw_writel(AT91_SMC_TCLR_(config->tclr)
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| AT91_SMC_TADL_(config->tadl)
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| AT91_SMC_TAR_(config->tar)
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| AT91_SMC_OCMS_(config->ocms)
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| AT91_SMC_TRR_(config->trr)
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| AT91_SMC_TWB_(config->twb)
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| AT91_SMC_RBNSEL_(config->rbnsel)
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| AT91_SMC_NFSEL_(config->nfsel),
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base + AT91_SAMA5_SMC_TIMINGS);
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}
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void sam9_smc_write_mode(int id, int cs,
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struct sam9_smc_config *config)
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{
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sam9_smc_cs_write_mode(AT91_SMC_CS(id, cs), config);
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}
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static void sam9_smc_cs_configure(void __iomem *base,
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struct sam9_smc_config *config)
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{
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/* Setup register */
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__raw_writel(AT91_SMC_NWESETUP_(config->nwe_setup)
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| AT91_SMC_NCS_WRSETUP_(config->ncs_write_setup)
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| AT91_SMC_NRDSETUP_(config->nrd_setup)
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| AT91_SMC_NCS_RDSETUP_(config->ncs_read_setup),
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base + AT91_SMC_SETUP);
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/* Pulse register */
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__raw_writel(AT91_SMC_NWEPULSE_(config->nwe_pulse)
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| AT91_SMC_NCS_WRPULSE_(config->ncs_write_pulse)
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| AT91_SMC_NRDPULSE_(config->nrd_pulse)
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| AT91_SMC_NCS_RDPULSE_(config->ncs_read_pulse),
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base + AT91_SMC_PULSE);
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/* Cycle register */
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__raw_writel(AT91_SMC_NWECYCLE_(config->write_cycle)
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| AT91_SMC_NRDCYCLE_(config->read_cycle),
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base + AT91_SMC_CYCLE);
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/* Mode register */
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sam9_smc_cs_write_mode(base, config);
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}
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void sam9_smc_configure(int id, int cs,
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struct sam9_smc_config *config)
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{
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sam9_smc_cs_configure(AT91_SMC_CS(id, cs), config);
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}
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static void sam9_smc_cs_read_mode(void __iomem *base,
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struct sam9_smc_config *config)
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{
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u32 val;
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void __iomem *mode_reg;
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switch (at91_soc_initdata.type) {
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case AT91_SOC_SAMA5D3:
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case AT91_SOC_SAMA5D4:
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mode_reg = base + AT91_SAMA5_SMC_MODE;
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break;
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default:
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mode_reg = base + AT91_SAM9_SMC_MODE;
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break;
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}
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val = __raw_readl(mode_reg);
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config->mode = (val & ~AT91_SMC_NWECYCLE);
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config->tdf_cycles = (val & AT91_SMC_NWECYCLE) >> 16 ;
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}
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void sam9_smc_read_mode(int id, int cs,
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struct sam9_smc_config *config)
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{
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sam9_smc_cs_read_mode(AT91_SMC_CS(id, cs), config);
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}
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static void sam9_smc_cs_read(void __iomem *base,
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struct sam9_smc_config *config)
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{
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u32 val;
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/* Setup register */
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val = __raw_readl(base + AT91_SMC_SETUP);
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config->nwe_setup = val & AT91_SMC_NWESETUP;
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config->ncs_write_setup = (val & AT91_SMC_NCS_WRSETUP) >> 8;
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config->nrd_setup = (val & AT91_SMC_NRDSETUP) >> 16;
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config->ncs_read_setup = (val & AT91_SMC_NCS_RDSETUP) >> 24;
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/* Pulse register */
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val = __raw_readl(base + AT91_SMC_PULSE);
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config->nwe_setup = val & AT91_SMC_NWEPULSE;
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config->ncs_write_pulse = (val & AT91_SMC_NCS_WRPULSE) >> 8;
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config->nrd_pulse = (val & AT91_SMC_NRDPULSE) >> 16;
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config->ncs_read_pulse = (val & AT91_SMC_NCS_RDPULSE) >> 24;
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/* Cycle register */
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val = __raw_readl(base + AT91_SMC_CYCLE);
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config->write_cycle = val & AT91_SMC_NWECYCLE;
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config->read_cycle = (val & AT91_SMC_NRDCYCLE) >> 16;
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/* Mode register */
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sam9_smc_cs_read_mode(base, config);
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}
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void sam9_smc_read(int id, int cs, struct sam9_smc_config *config)
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{
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sam9_smc_cs_read(AT91_SMC_CS(id, cs), config);
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}
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void sama5_smc_configure(int id, int cs, struct sam9_smc_config *config)
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{
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sam9_smc_configure(id, cs, config);
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sam9_smc_cs_write_timings(AT91_SMC_CS(id, cs), config);
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}
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static int at91sam9_smc_probe(struct device_d *dev)
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{
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struct resource *iores;
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int id = dev->id;
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if (id < 0) {
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id = 0;
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} else if (id > 1) {
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dev_warn(dev, "id > 1\n");
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return -EIO;
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}
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iores = dev_request_mem_resource(dev, 0);
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if (IS_ERR(iores)) {
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dev_err(dev, "Impossible to request smc.%d\n", id);
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return PTR_ERR(iores);
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}
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smc_base_addr[id] = IOMEM(iores->start);
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return 0;
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}
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static struct driver_d at91sam9_smc_driver = {
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.name = "at91sam9-smc",
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.probe = at91sam9_smc_probe,
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};
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static int at91sam9_smc_init(void)
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{
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return platform_driver_register(&at91sam9_smc_driver);
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}
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coredevice_initcall(at91sam9_smc_init);
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