b792124a7d
remap_range is for remapping regions with different cache attributes. It is implemented for ARM and PowerPC only, the other architectures only provide stubs. Currently the new cache attributes are passed in an architecture specific way and the attributes have to be retrieved by calls to mmu_get_pte_cached_flags() and mmu_get_pte_uncached_flags(). Make this simpler by providing architecture independent flags which can be directly passed to remap_range() Also provide a MAP_ARCH_DEFAULT flag and a arch_can_remap() function. The MAP_ARCH_DEFAULT defaults to whatever caching type the architecture has as default. the arch_can_remap() function returns true if the architecture can change the cache attributes, false otherwise. This allows the memtest code to better find out what it has to do. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
59 lines
1.4 KiB
C
59 lines
1.4 KiB
C
/*
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* Copyright 2014 GE Intelligent Platforms, Inc.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <asm/cache.h>
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#include <mmu.h>
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#include <mach/mmu.h>
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int arch_remap_range(void *_start, size_t size, unsigned flags)
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{
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uint32_t ptr, start, tsize, valid, wimge, pte_flags;
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unsigned long epn;
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phys_addr_t rpn = 0;
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int esel = 0;
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switch (flags) {
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case MAP_UNCACHED:
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pte_flags = MAS2_I;
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break;
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case MAP_CACHED:
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pte_flags = 0;
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break;
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default:
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return -EINVAL;
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}
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ptr = start = (uint32_t)_start;
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wimge = pte_flags | MAS2_M;
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while (ptr < (start + size)) {
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esel = e500_find_tlb_idx((void *)ptr, 1);
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if (esel != -1)
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break;
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e500_read_tlbcam_entry(esel, &valid, &tsize, &epn,
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&rpn);
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if (flags & MAS2_I) {
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flush_dcache();
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invalidate_icache();
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}
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e500_set_tlb(1, epn, rpn, MAS3_SX|MAS3_SW|MAS3_SR,
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(u8)wimge, 0, esel, tsize, 1);
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/* convert tsize to bytes to increment address. */
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ptr += (1ULL << ((tsize) + 10));
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}
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return 0;
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}
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