51 lines
1.4 KiB
ReStructuredText
51 lines
1.4 KiB
ReStructuredText
Marvell Embedded Business Unit (mvebu)
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======================================
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Move of the Register Window
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---------------------------
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When an mvebu SoC comes up the internal registers are mapped at 0xd0000000 in
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the address space. To make it possible to have more than 3.25 GiB of continuous
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RAM in Linux this window is moved to 0xf1000000.
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Unfortunately the register to configure the location of the registers is located
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in this window, so there is no way to determine the location afterwards.
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RAM initialisation
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------------------
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Traditionally the RAM initialisation happens with a binary blob that have to be
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extracted from the vendor U-Boot::
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scripts/kwbimage -x -i /dev/mtdblock0 -o .
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This creates among others a file "binary.0" that has to be put into the board
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directory. For license reasons this is usually not included in the barebox
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repository.
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Note that in the meantime U-Boot has open source code to do the RAM
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initialisation that could be taken.
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Booting second stage
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--------------------
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This is currently not possible because barebox assumes the registers are mapped
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at 0xd0000000 as is the case when the boot ROM gives control to the bootloader.
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Booting from UART
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-----------------
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The mvebu SoCs support booting from UART. For this there is a tool available in
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barebox called kwboot.
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mvebu boards
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------------
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Not all supported boards have a description here.
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.. toctree::
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:glob:
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:numbered:
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:maxdepth: 1
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mvebu/*
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