141 lines
4.4 KiB
C
141 lines
4.4 KiB
C
#ifndef __ASM_ARM_SYSTEM_H
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#define __ASM_ARM_SYSTEM_H
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#if __LINUX_ARM_ARCH__ >= 7
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#define isb() __asm__ __volatile__ ("isb" : : : "memory")
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#ifdef CONFIG_CPU_64v8
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#define dsb() __asm__ __volatile__ ("dsb sy" : : : "memory")
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#else
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#define dsb() __asm__ __volatile__ ("dsb" : : : "memory")
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#endif
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#define dmb() __asm__ __volatile__ ("dmb" : : : "memory")
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#elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6
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#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
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: : "r" (0) : "memory")
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#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
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: : "r" (0) : "memory")
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#define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \
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: : "r" (0) : "memory")
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#elif defined(CONFIG_CPU_FA526)
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#define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \
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: : "r" (0) : "memory")
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#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
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: : "r" (0) : "memory")
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#define dmb() __asm__ __volatile__ ("" : : : "memory")
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#else
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#define isb() __asm__ __volatile__ ("" : : : "memory")
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#define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \
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: : "r" (0) : "memory")
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#define dmb() __asm__ __volatile__ ("" : : : "memory")
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#endif
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/*
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* CR1 bits (CP#15 CR1)
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*/
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#define CR_M (1 << 0) /* MMU enable */
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#define CR_A (1 << 1) /* Alignment abort enable */
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#define CR_C (1 << 2) /* Dcache enable */
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#define CR_W (1 << 3) /* Write buffer enable */
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#define CR_P (1 << 4) /* 32-bit exception handler */
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#define CR_D (1 << 5) /* 32-bit data address range */
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#define CR_L (1 << 6) /* Implementation defined */
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#define CR_B (1 << 7) /* Big endian */
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#define CR_S (1 << 8) /* System MMU protection */
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#define CR_R (1 << 9) /* ROM MMU protection */
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#define CR_F (1 << 10) /* Implementation defined */
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#define CR_Z (1 << 11) /* Implementation defined */
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#define CR_I (1 << 12) /* Icache enable */
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#define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
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#define CR_RR (1 << 14) /* Round Robin cache replacement */
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#define CR_L4 (1 << 15) /* LDR pc can set T bit */
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#define CR_DT (1 << 16)
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#define CR_IT (1 << 18)
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#define CR_ST (1 << 19)
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#define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */
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#define CR_U (1 << 22) /* Unaligned access operation */
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#define CR_XP (1 << 23) /* Extended page tables */
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#define CR_VE (1 << 24) /* Vectored interrupts */
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#define CR_EE (1 << 25) /* Exception (Big) Endian */
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#define CR_TRE (1 << 28) /* TEX remap enable */
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#define CR_AFE (1 << 29) /* Access flag enable */
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#define CR_TE (1 << 30) /* Thumb exception enable */
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#ifndef __ASSEMBLY__
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#if __LINUX_ARM_ARCH__ >= 7
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static inline unsigned int current_el(void)
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{
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unsigned int el;
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asm volatile("mrs %0, CurrentEL" : "=r" (el) : : "cc");
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return el >> 2;
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}
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static inline unsigned long read_mpidr(void)
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{
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unsigned long val;
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asm volatile("mrs %0, mpidr_el1" : "=r" (val));
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return val;
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}
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#endif
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static inline unsigned int get_cr(void)
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{
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unsigned int val;
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#ifdef CONFIG_CPU_64v8
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unsigned int el = current_el();
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if (el == 1)
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asm volatile("mrs %0, sctlr_el1" : "=r" (val) : : "cc");
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else if (el == 2)
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asm volatile("mrs %0, sctlr_el2" : "=r" (val) : : "cc");
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else
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asm volatile("mrs %0, sctlr_el3" : "=r" (val) : : "cc");
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#else
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asm volatile ("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc");
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#endif
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return val;
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}
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static inline void set_cr(unsigned int val)
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{
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#ifdef CONFIG_CPU_64v8
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unsigned int el;
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el = current_el();
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if (el == 1)
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asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc");
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else if (el == 2)
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asm volatile("msr sctlr_el2, %0" : : "r" (val) : "cc");
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else
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asm volatile("msr sctlr_el3, %0" : : "r" (val) : "cc");
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#else
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asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR"
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: : "r" (val) : "cc");
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#endif
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isb();
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}
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#ifdef CONFIG_CPU_32v7
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static inline unsigned int get_vbar(void)
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{
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unsigned int vbar;
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asm volatile("mrc p15, 0, %0, c12, c0, 0 @ get VBAR"
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: "=r" (vbar) : : "cc");
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return vbar;
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}
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static inline void set_vbar(unsigned int vbar)
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{
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asm volatile("mcr p15, 0, %0, c12, c0, 0 @ set VBAR"
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: : "r" (vbar) : "cc");
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isb();
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}
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#else
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static inline unsigned int get_vbar(void) { return 0; }
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static inline void set_vbar(unsigned int vbar) {}
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#endif
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#endif
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#endif /* __ASM_ARM_SYSTEM_H */
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