99 lines
3.4 KiB
C
99 lines
3.4 KiB
C
/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <init.h>
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#include <mach/imx25-regs.h>
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#include <mach/iim.h>
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#include <io.h>
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#include <mach/weim.h>
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#include <mach/generic.h>
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#include <linux/sizes.h>
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#define MX25_BOOTROM_HAB_MAGIC 0x3c95cac6
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#define MX25_DRYICE_GPR 0x3c
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/* IIM fuse definitions */
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#define IIM_BANK0_BASE (MX25_IIM_BASE_ADDR + 0x800)
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#define IIM_BANK1_BASE (MX25_IIM_BASE_ADDR + 0xc00)
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#define IIM_BANK2_BASE (MX25_IIM_BASE_ADDR + 0x1000)
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#define IIM_UID (IIM_BANK0_BASE + 0x20)
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#define IIM_MAC_ADDR (IIM_BANK0_BASE + 0x68)
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u64 imx_uid(void)
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{
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u64 uid = 0;
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int i;
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/*
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* This code assumes that the UID is stored little-endian. The
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* Freescale AN3682 document is silent about the endianess, but
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* experimentation shows that this is the case. All other multi-byte
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* values in IIM are big-endian as per AN3682.
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*/
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for (i = 0; i < 8; i++)
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uid |= (u64)readb(IIM_UID + i*4) << (i*8);
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return uid;
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}
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int imx25_init(void)
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{
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int val;
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imx25_boot_save_loc((void *)MX25_CCM_BASE_ADDR);
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add_generic_device("imx25-esdctl", 0, NULL, MX25_ESDCTL_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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/*
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* When the i.MX25 is used with internal boot, the boot ROM always
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* performs some HAB actions. These will copy the value from DryIce
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* GPR (0x53ffc03c) to a location in SRAM (0x78001734) and then overwrites
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* the GPR with 0x3c95cac6.
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* After the HAB routine is done, the boot ROM should copy the previously
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* saved value from SRAM back to the GPR. The last step is not done.
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* The boot ROM is officially broken in this regard.
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* This renders the Non-volatile memory to a Non-Non-volatile memory.
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* To still be able to use the GPR for its intended purpose, copy the
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* saved SRAM value back manually.
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*/
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val = readl(MX25_IRAM_BASE_ADDR + 0x1734);
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/*
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* When there is a different value in SRAM than the magic value
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* it must be a value saved to the GPR.
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*/
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if (val != MX25_BOOTROM_HAB_MAGIC)
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writel(val, MX25_DRYICE_BASE_ADDR + MX25_DRYICE_GPR);
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return 0;
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}
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int imx25_devices_init(void)
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{
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add_generic_device("imx_iim", 0, NULL, MX25_IIM_BASE_ADDR, SZ_4K,
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IORESOURCE_MEM, NULL);
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add_generic_device("imx-iomuxv3", 0, NULL, MX25_IOMUXC_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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add_generic_device("imx25-ccm", 0, NULL, MX25_CCM_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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add_generic_device("imx31-gpt", 0, NULL, MX25_GPT1_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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add_generic_device("imx31-gpio", 0, NULL, MX25_GPIO1_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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add_generic_device("imx31-gpio", 1, NULL, MX25_GPIO2_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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add_generic_device("imx31-gpio", 2, NULL, MX25_GPIO3_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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add_generic_device("imx31-gpio", 3, NULL, MX25_GPIO4_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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add_generic_device("imx21-wdt", 0, NULL, MX25_WDOG_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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add_generic_device("imx25-usb-misc", 0, NULL, MX25_USB_OTG_BASE_ADDR + 0x600, 0x100, IORESOURCE_MEM, NULL);
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return 0;
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}
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