105 lines
3.3 KiB
C
105 lines
3.3 KiB
C
/*
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* Based on Linux driver:
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* Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved.
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* Copyright (C) 2006 FON Technology, SL.
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* Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
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* Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
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* Ported to Barebox:
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* Copyright (C) 2013 Oleksij Rempel <linux@rempel-privat.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __AR231X_PLATFORM_H
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#define __AR231X_PLATFORM_H
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/*
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* This is board-specific data that is stored in a "fixed" location in flash.
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* It is shared across operating systems, so it should not be changed lightly.
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* The main reason we need it is in order to extract the ethernet MAC
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* address(es).
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*/
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struct ar231x_board_config {
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u32 magic; /* board data is valid */
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#define AR231X_BD_MAGIC 0x35333131 /* "5311", for all 531x platforms */
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u16 cksum; /* checksum (starting with BD_REV 2) */
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u16 rev; /* revision of this struct */
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#define BD_REV 4
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char boardName[64]; /* Name of board */
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u16 major; /* Board major number */
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u16 minor; /* Board minor number */
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u32 flags; /* Board configuration */
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#define BD_ENET0 0x00000001 /* ENET0 is stuffed */
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#define BD_ENET1 0x00000002 /* ENET1 is stuffed */
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#define BD_UART1 0x00000004 /* UART1 is stuffed */
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#define BD_UART0 0x00000008 /* UART0 is stuffed (dma) */
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#define BD_RSTFACTORY 0x00000010 /* Reset factory defaults stuffed */
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#define BD_SYSLED 0x00000020 /* System LED stuffed */
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#define BD_EXTUARTCLK 0x00000040 /* External UART clock */
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#define BD_CPUFREQ 0x00000080 /* cpu freq is valid in nvram */
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#define BD_SYSFREQ 0x00000100 /* sys freq is set in nvram */
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#define BD_WLAN0 0x00000200 /* Enable WLAN0 */
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#define BD_MEMCAP 0x00000400 /* CAP SDRAM @ memCap for testing */
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#define BD_DISWATCHDOG 0x00000800 /* disable system watchdog */
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#define BD_WLAN1 0x00001000 /* Enable WLAN1 (ar5212) */
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#define BD_ISCASPER 0x00002000 /* FLAG for AR2312 */
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#define BD_WLAN0_2G_EN 0x00004000 /* FLAG for radio0_2G */
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#define BD_WLAN0_5G_EN 0x00008000 /* FLAG for radio0_2G */
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#define BD_WLAN1_2G_EN 0x00020000 /* FLAG for radio0_2G */
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#define BD_WLAN1_5G_EN 0x00040000 /* FLAG for radio0_2G */
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u16 resetConfigGpio; /* Reset factory GPIO pin */
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u16 sysLedGpio; /* System LED GPIO pin */
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u32 cpuFreq; /* CPU core frequency in Hz */
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u32 sysFreq; /* System frequency in Hz */
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u32 cntFreq; /* Calculated C0_COUNT frequency */
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u8 wlan0_mac[6];
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u8 enet0_mac[6];
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u8 enet1_mac[6];
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u16 pciId; /* Pseudo PCIID for common code */
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u16 memCap; /* cap bank1 in MB */
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/* version 3 */
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u8 wlan1_mac[6]; /* (ar5212) */
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};
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#define BOARD_CONFIG_BUFSZ 0x1000
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/*
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* Platform device information for the Ethernet MAC
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*/
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enum reset_state {
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SET,
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REMOVE,
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};
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struct ar231x_eth_platform_data {
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u32 base_reset;
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u32 reset_mac;
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u32 reset_phy;
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u8 *mac;
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void (*reset_bit)(u32 val, enum reset_state state);
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};
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struct ar231x_board_data {
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u16 devid;
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/* board config data */
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struct ar231x_board_config *config;
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struct ar231x_eth_platform_data eth_pdata;
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};
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void ar231x_find_config(u8 *flash_limit);
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void ar231x_reset_bit(u32 val, enum reset_state state);
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#endif /* __AR231X_PLATFORM_H */
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