8529f1281a
"%d" in format string requires a signed integer. "%u" in format string requires a unsigned integer. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
210 lines
5.3 KiB
C
210 lines
5.3 KiB
C
/*
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* (C) Copyright 2010 Juergen Beisert - Pengutronix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <init.h>
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#include <gpio.h>
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#include <errno.h>
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#include <io.h>
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#include <mach/iomux.h>
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#include <stmp-device.h>
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#include <mach/imx-regs.h>
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#define HW_PINCTRL_CTRL 0x000
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#define HW_PINCTRL_MUXSEL0 0x100
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#ifdef CONFIG_ARCH_IMX23
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#define HW_PINCTRL_DRIVE0 0x200
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#define HW_PINCTRL_PULL0 0x400
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#define HW_PINCTRL_DOUT0 0x500
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#define HW_PINCTRL_DIN0 0x600
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#define HW_PINCTRL_DOE0 0x700
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#define MAX_GPIO_NO 95
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#endif
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#ifdef CONFIG_ARCH_IMX28
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#define HW_PINCTRL_DRIVE0 0x300
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#define HW_PINCTRL_PULL0 0x600
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#define HW_PINCTRL_DOUT0 0x700
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#define HW_PINCTRL_DIN0 0x900
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#define HW_PINCTRL_DOE0 0xb00
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#define MAX_GPIO_NO 159
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#endif
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static unsigned calc_mux_reg(unsigned no)
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{
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/* each register controls 16 pads */
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return ((no >> 4) << 4) + HW_PINCTRL_MUXSEL0;
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}
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static unsigned calc_strength_reg(unsigned no)
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{
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/* each register controls 8 pads */
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return ((no >> 3) << 4) + HW_PINCTRL_DRIVE0;
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}
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static unsigned calc_pullup_reg(unsigned no)
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{
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/* each register controls 32 pads */
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return ((no >> 5) << 4) + HW_PINCTRL_PULL0;
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}
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static unsigned calc_output_enable_reg(unsigned no)
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{
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/* each register controls 32 pads */
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return ((no >> 5) << 4) + HW_PINCTRL_DOE0;
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}
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static unsigned calc_output_reg(unsigned no)
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{
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/* each register controls 32 pads */
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return ((no >> 5) << 4) + HW_PINCTRL_DOUT0;
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}
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static unsigned calc_input_reg(unsigned no)
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{
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/* each register controls 32 pads */
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return ((no >> 5) << 4) + HW_PINCTRL_DIN0;
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}
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/**
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* @param[in] m One pin define per call from iomux-mx23.h/iomux-mx28.h
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*/
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void imx_gpio_mode(uint32_t m)
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{
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uint32_t reg;
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unsigned gpio_pin, reg_offset;
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gpio_pin = GET_GPIO_NO(m);
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/* configure the pad to its function (always) */
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reg_offset = calc_mux_reg(gpio_pin);
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reg = readl(IMX_IOMUXC_BASE + reg_offset) & ~(0x3 << ((gpio_pin % 16) << 1));
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reg |= GET_FUNC(m) << ((gpio_pin % 16) << 1);
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writel(reg, IMX_IOMUXC_BASE + reg_offset);
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/* some pins are disabled when configured for GPIO */
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if ((gpio_pin > MAX_GPIO_NO) && (GET_FUNC(m) == IS_GPIO)) {
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printf("Cannot configure pad %u to GPIO\n", gpio_pin);
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return;
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}
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if (SE_PRESENT(m)) {
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reg_offset = calc_strength_reg(gpio_pin);
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reg = readl(IMX_IOMUXC_BASE + reg_offset) & ~(0x3 << ((gpio_pin % 8) << 2));
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reg |= GET_STRENGTH(m) << ((gpio_pin % 8) << 2);
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writel(reg, IMX_IOMUXC_BASE + reg_offset);
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}
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if (VE_PRESENT(m)) {
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reg_offset = calc_strength_reg(gpio_pin);
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if (GET_VOLTAGE(m) == 1)
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writel(0x1 << (((gpio_pin % 8) << 2) + 2),
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IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_SET);
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else
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writel(0x1 << (((gpio_pin % 8) << 2) + 2),
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IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_CLR);
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}
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if (PE_PRESENT(m)) {
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reg_offset = calc_pullup_reg(gpio_pin);
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writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE + reg_offset +
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(GET_PULLUP(m) == 1 ?
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STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR));
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}
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if (BK_PRESENT(m)) {
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reg_offset = calc_pullup_reg(gpio_pin);
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writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE + reg_offset +
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(GET_BITKEEPER(m) == 1 ?
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STMP_OFFSET_REG_CLR : STMP_OFFSET_REG_SET));
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}
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if (GET_FUNC(m) == IS_GPIO) {
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if (GET_GPIODIR(m) == 1) {
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/* first set the output value */
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reg_offset = calc_output_reg(gpio_pin);
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writel(0x1 << (gpio_pin % 32), IMX_IOMUXC_BASE +
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reg_offset + (GET_GPIOVAL(m) == 1 ?
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STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR));
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/* then the direction */
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reg_offset = calc_output_enable_reg(gpio_pin);
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writel(0x1 << (gpio_pin % 32),
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IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_SET);
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} else {
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/* then the direction */
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reg_offset = calc_output_enable_reg(gpio_pin);
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writel(0x1 << (gpio_pin % 32),
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IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_CLR);
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}
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}
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}
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int gpio_direction_input(unsigned gpio)
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{
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unsigned reg_offset;
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if (gpio > MAX_GPIO_NO)
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return -EINVAL;
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reg_offset = calc_output_enable_reg(gpio);
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writel(0x1 << (gpio % 32), IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_CLR);
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return 0;
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}
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int gpio_direction_output(unsigned gpio, int val)
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{
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unsigned reg_offset;
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if (gpio > MAX_GPIO_NO)
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return -EINVAL;
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/* first set the output value... */
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reg_offset = calc_output_reg(gpio);
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writel(0x1 << (gpio % 32), IMX_IOMUXC_BASE +
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reg_offset + (val != 0 ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR));
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/* ...then the direction */
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reg_offset = calc_output_enable_reg(gpio);
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writel(0x1 << (gpio % 32), IMX_IOMUXC_BASE + reg_offset + STMP_OFFSET_REG_SET);
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return 0;
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}
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void gpio_set_value(unsigned gpio, int val)
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{
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unsigned reg_offset;
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reg_offset = calc_output_reg(gpio);
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writel(0x1 << (gpio % 32), IMX_IOMUXC_BASE +
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reg_offset + (val != 0 ?
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STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR));
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}
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int gpio_get_value(unsigned gpio)
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{
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uint32_t reg;
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unsigned reg_offset;
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reg_offset = calc_input_reg(gpio);
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reg = readl(IMX_IOMUXC_BASE + reg_offset);
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if (reg & (0x1 << (gpio % 32)))
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return 1;
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return 0;
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}
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