Sascha Hauer 798e976bf2 ARM: mxs: make ssp gates parents of ssp dividers ... When changing the rates of the ssp clocks we have to poll the busy bit, but only when they are enabled. The current code can not check this properly since the gates are registered as children of the dividers. This has the effect that when the gate is disabled the busy bit will be set forever resulting in a freezed system. Fix this by making the gates parents of the dividers which allows clk_is_enabled to return the correct result. The Kernel has the same problem, but here the busy polling is limited to 10ms, so probably noone noticed this. The datasheet mentions that the ssp dividers shall only be changed when the clocks are enabled. The kernel and barebox currently ignore this. I don't know what effect violating this rule has. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>		2013-07-15 10:08:54 +02:00
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mxs	ARM: mxs: make ssp gates parents of ssp dividers	2013-07-15 10:08:54 +02:00
tegra	tegra: add peripheral clocks	2013-07-02 08:36:09 +02:00
Kconfig	clk: add clock lookup from devicetree	2013-07-02 08:36:09 +02:00
Makefile	tegra: add new clock framework driver	2013-07-02 08:36:09 +02:00
clk-divider-table.c	clk: Add clk table based divider support	2012-12-06 12:55:21 +01:00
clk-divider.c	clk: divider: Add onebased divider support	2013-06-20 08:44:22 +02:00
clk-fixed-factor.c	clk: initial common clk support	2012-10-04 15:19:55 +02:00
clk-fixed.c	clk: Add is_enabled callback	2013-03-15 09:53:30 +01:00
clk-gate.c	clk: allow to instanciate clk gate without registering it	2013-07-02 08:36:09 +02:00
clk-mux.c	clk: allow to instanciate clk mux without registering it	2013-07-02 08:36:09 +02:00
clk.c	clk: add clock lookup from devicetree	2013-07-02 08:36:09 +02:00
clkdev.c	clk: add clock lookup from devicetree	2013-07-02 08:36:09 +02:00