60 lines
1.8 KiB
C
60 lines
1.8 KiB
C
/*
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* Copyright (C) 2009 Juergen Beisert, Pengutronix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#ifndef MACH_S3C24XX_NAND_H
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# define MACH_S3C24XX_NAND_H
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#ifdef CONFIG_S3C_NAND_BOOT
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extern void s3c24x0_nand_load_image(void*, int, int);
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#endif
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/**
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* Locate the timing bits for the NFCONF register
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* @param setup is the TACLS clock count
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* @param access is the TWRPH0 clock count
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* @param hold is the TWRPH1 clock count
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*
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* @note A clock count of 0 means always 1 HCLK clock.
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* @note Clock count settings depend on the NAND flash requirements and the current HCLK speed
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*/
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#ifdef CONFIG_CPU_S3C2410
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# define CALC_NFCONF_TIMING(setup, access, hold) \
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((setup << 8) + (access << 4) + (hold << 0))
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#endif
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#ifdef CONFIG_CPU_S3C2440
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# define CALC_NFCONF_TIMING(setup, access, hold) \
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((setup << 12) + (access << 8) + (hold << 4))
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#endif
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/**
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* Define platform specific data for the NAND controller and its device
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*/
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struct s3c24x0_nand_platform_data {
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uint32_t nand_timing; /**< value for the NFCONF register (timing bits only) */
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char flash_bbt; /**< force a flash based BBT */
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};
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/**
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* @file
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* @brief Basic declaration to use the s3c24x0 NAND driver
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*/
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#endif /* MACH_S3C24XX_NAND_H */
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