157 lines
6.1 KiB
C
157 lines
6.1 KiB
C
/*
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* Copyright (C) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <common.h>
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#include <init.h>
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#include <driver.h>
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#include <linux/clk.h>
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#include <io.h>
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#include <linux/clkdev.h>
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#include <linux/err.h>
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#include <mach/imx-regs.h>
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#include "clk.h"
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#define PLLCTRL0 (regs + 0x0000)
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#define CPU (regs + 0x0020)
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#define HBUS (regs + 0x0030)
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#define XBUS (regs + 0x0040)
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#define XTAL (regs + 0x0050)
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#define PIX (regs + 0x0060)
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#define SSP (regs + 0x0070)
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#define GPMI (regs + 0x0080)
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#define SPDIF (regs + 0x0090)
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#define EMI (regs + 0x00a0)
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#define SAIF (regs + 0x00c0)
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#define TV (regs + 0x00d0)
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#define ETM (regs + 0x00e0)
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#define FRAC (regs + 0x00f0)
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#define CLKSEQ (regs + 0x0110)
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static const char *sel_pll[] = { "pll", "ref_xtal", };
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static const char *sel_cpu[] = { "ref_cpu", "ref_xtal", };
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static const char *sel_pix[] = { "ref_pix", "ref_xtal", };
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static const char *sel_io[] = { "ref_io", "ref_xtal", };
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static const char *cpu_sels[] = { "cpu_pll", "cpu_xtal", };
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static const char *emi_sels[] = { "emi_pll", "emi_xtal", };
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enum imx23_clk {
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ref_xtal, pll, ref_cpu, ref_emi, ref_pix, ref_io, saif_sel,
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lcdif_sel, gpmi_sel, ssp_sel, emi_sel, cpu, etm_sel, cpu_pll,
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cpu_xtal, hbus, xbus, lcdif_div, ssp_div, gpmi_div, emi_pll,
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emi_xtal, etm_div, saif_div, clk32k_div, rtc, adc, spdif_div,
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clk32k, dri, pwm, filt, uart, ssp, gpmi, spdif, emi, saif,
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lcdif, etm, usb, usb_phy, lcdif_comp,
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clk_max
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};
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static struct clk *clks[clk_max];
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int __init mx23_clocks_init(void __iomem *regs)
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{
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clks[ref_xtal] = mxs_clk_fixed("ref_xtal", 24000000);
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clks[pll] = mxs_clk_pll("pll", "ref_xtal", PLLCTRL0, 16, 480000000);
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clks[ref_cpu] = mxs_clk_ref("ref_cpu", "pll", FRAC, 0);
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clks[ref_emi] = mxs_clk_ref("ref_emi", "pll", FRAC, 1);
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clks[ref_pix] = mxs_clk_ref("ref_pix", "pll", FRAC, 2);
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clks[ref_io] = mxs_clk_ref("ref_io", "pll", FRAC, 3);
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clks[saif_sel] = mxs_clk_mux("saif_sel", CLKSEQ, 0, 1, sel_pll, ARRAY_SIZE(sel_pll));
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clks[lcdif_sel] = mxs_clk_mux("lcdif_sel", CLKSEQ, 1, 1, sel_pix, ARRAY_SIZE(sel_pix));
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clks[gpmi_sel] = mxs_clk_mux("gpmi_sel", CLKSEQ, 4, 1, sel_io, ARRAY_SIZE(sel_io));
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clks[ssp_sel] = mxs_clk_mux("ssp_sel", CLKSEQ, 5, 1, sel_io, ARRAY_SIZE(sel_io));
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clks[emi_sel] = mxs_clk_mux("emi_sel", CLKSEQ, 6, 1, emi_sels, ARRAY_SIZE(emi_sels));
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clks[cpu] = mxs_clk_mux("cpu", CLKSEQ, 7, 1, cpu_sels, ARRAY_SIZE(cpu_sels));
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clks[etm_sel] = mxs_clk_mux("etm_sel", CLKSEQ, 8, 1, sel_cpu, ARRAY_SIZE(sel_cpu));
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clks[cpu_pll] = mxs_clk_div("cpu_pll", "ref_cpu", CPU, 0, 6, 28);
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clks[cpu_xtal] = mxs_clk_div("cpu_xtal", "ref_xtal", CPU, 16, 10, 29);
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clks[hbus] = mxs_clk_div("hbus", "cpu", HBUS, 0, 5, 29);
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clks[xbus] = mxs_clk_div("xbus", "ref_xtal", XBUS, 0, 10, 31);
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clks[lcdif_div] = mxs_clk_div("lcdif_div", "lcdif_sel", PIX, 0, 12, 29);
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clks[ssp_div] = mxs_clk_div("ssp_div", "ssp_sel", SSP, 0, 9, 29);
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clks[gpmi_div] = mxs_clk_div("gpmi_div", "gpmi_sel", GPMI, 0, 10, 29);
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clks[emi_pll] = mxs_clk_div("emi_pll", "ref_emi", EMI, 0, 6, 28);
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clks[emi_xtal] = mxs_clk_div("emi_xtal", "ref_xtal", EMI, 8, 4, 29);
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clks[etm_div] = mxs_clk_div("etm_div", "etm_sel", ETM, 0, 6, 29);
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clks[saif_div] = mxs_clk_frac("saif_div", "saif_sel", SAIF, 0, 16, 29);
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clks[clk32k_div] = mxs_clk_fixed_factor("clk32k_div", "ref_xtal", 1, 750);
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clks[rtc] = mxs_clk_fixed_factor("rtc", "ref_xtal", 1, 768);
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clks[adc] = mxs_clk_fixed_factor("adc", "clk32k", 1, 16);
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clks[spdif_div] = mxs_clk_fixed_factor("spdif_div", "pll", 1, 4);
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clks[clk32k] = mxs_clk_gate("clk32k", "clk32k_div", XTAL, 26);
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clks[dri] = mxs_clk_gate("dri", "ref_xtal", XTAL, 28);
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clks[pwm] = mxs_clk_gate("pwm", "ref_xtal", XTAL, 29);
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clks[filt] = mxs_clk_gate("filt", "ref_xtal", XTAL, 30);
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clks[uart] = mxs_clk_gate("uart", "ref_xtal", XTAL, 31);
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clks[ssp] = mxs_clk_gate("ssp", "ssp_div", SSP, 31);
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clks[gpmi] = mxs_clk_gate("gpmi", "gpmi_div", GPMI, 31);
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clks[spdif] = mxs_clk_gate("spdif", "spdif_div", SPDIF, 31);
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clks[emi] = mxs_clk_gate("emi", "emi_sel", EMI, 31);
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clks[saif] = mxs_clk_gate("saif", "saif_div", SAIF, 31);
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clks[lcdif] = mxs_clk_gate("lcdif", "lcdif_div", PIX, 31);
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clks[etm] = mxs_clk_gate("etm", "etm_div", ETM, 31);
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clks[lcdif_comp] = mxs_clk_lcdif("lcdif_comp", clks[ref_pix],
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clks[lcdif_div], clks[lcdif]);
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clk_set_rate(clks[ref_io], 480000000);
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clk_set_parent(clks[ssp_sel], clks[ref_io]);
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clk_set_rate(clks[ssp_div], 96000000);
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clk_set_parent(clks[lcdif_sel], clks[ref_pix]);
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clkdev_add_physbase(clks[ssp], IMX_SSP1_BASE, NULL);
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clkdev_add_physbase(clks[ssp], IMX_SSP2_BASE, NULL);
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clkdev_add_physbase(clks[xbus], IMX_DBGUART_BASE, NULL);
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clkdev_add_physbase(clks[hbus], IMX_OCOTP_BASE, NULL);
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clkdev_add_physbase(clks[uart], IMX_UART1_BASE, NULL);
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clkdev_add_physbase(clks[uart], IMX_UART2_BASE, NULL);
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clkdev_add_physbase(clks[gpmi], MXS_GPMI_BASE, NULL);
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if (IS_ENABLED(CONFIG_DRIVER_VIDEO_STM))
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clkdev_add_physbase(clks[lcdif_comp], IMX_FB_BASE, NULL);
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return 0;
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}
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static int imx23_ccm_probe(struct device_d *dev)
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{
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void __iomem *regs;
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regs = dev_request_mem_region(dev, 0);
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mx23_clocks_init(regs);
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return 0;
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}
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static __maybe_unused struct of_device_id imx23_ccm_dt_ids[] = {
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{
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.compatible = "fsl,imx23-clkctrl",
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}, {
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/* sentinel */
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}
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};
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static struct driver_d imx23_ccm_driver = {
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.probe = imx23_ccm_probe,
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.name = "imx23-clkctrl",
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.of_compatible = DRV_OF_COMPAT(imx23_ccm_dt_ids),
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};
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static int imx23_ccm_init(void)
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{
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return platform_driver_register(&imx23_ccm_driver);
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}
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postcore_initcall(imx23_ccm_init);
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