237 lines
6.6 KiB
C
237 lines
6.6 KiB
C
/*
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* arch/arm/mach-at91/at91rm9200_devices.c
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*
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* Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
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* Copyright (C) 2005 David Brownell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <common.h>
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#include <asm/armlinux.h>
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#include <mach/hardware.h>
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#include <mach/at91rm9200.h>
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#include <mach/board.h>
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#include <mach/gpio.h>
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#include <mach/io.h>
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#include "generic.h"
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void at91_add_device_sdram(u32 size)
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{
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arm_add_mem_device("ram0", AT91_CHIPSELECT_1, size);
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}
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/* --------------------------------------------------------------------
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* USB Host
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_USB_OHCI)
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void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
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{
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if (!data)
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return;
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add_generic_device("at91_ohci", -1, NULL, AT91RM9200_UHP_BASE, 1024 * 1024,
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IORESOURCE_MEM, data);
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}
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#else
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void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {}
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#endif
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/* --------------------------------------------------------------------
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* Ethernet
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_DRIVER_NET_AT91_ETHER)
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void __init at91_add_device_eth(struct at91_ether_platform_data *data)
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{
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if (!data)
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return;
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/* Pins used for MII and RMII */
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at91_set_A_periph(AT91_PIN_PA16, 0); /* EMDIO */
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at91_set_A_periph(AT91_PIN_PA15, 0); /* EMDC */
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at91_set_A_periph(AT91_PIN_PA14, 0); /* ERXER */
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at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
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at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
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at91_set_A_periph(AT91_PIN_PA11, 0); /* ECRS_ECRSDV */
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at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX1 */
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at91_set_A_periph(AT91_PIN_PA9, 0); /* ETX0 */
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at91_set_A_periph(AT91_PIN_PA8, 0); /* ETXEN */
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at91_set_A_periph(AT91_PIN_PA7, 0); /* ETXCK_EREFCK */
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if (!(data->flags & AT91SAM_ETHER_RMII)) {
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at91_set_B_periph(AT91_PIN_PB19, 0); /* ERXCK */
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at91_set_B_periph(AT91_PIN_PB18, 0); /* ECOL */
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at91_set_B_periph(AT91_PIN_PB17, 0); /* ERXDV */
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at91_set_B_periph(AT91_PIN_PB16, 0); /* ERX3 */
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at91_set_B_periph(AT91_PIN_PB15, 0); /* ERX2 */
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at91_set_B_periph(AT91_PIN_PB14, 0); /* ETXER */
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at91_set_B_periph(AT91_PIN_PB13, 0); /* ETX3 */
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at91_set_B_periph(AT91_PIN_PB12, 0); /* ETX2 */
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}
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add_generic_device("at91_ether", 0, NULL, AT91_VA_BASE_EMAC, 0x1000,
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IORESOURCE_MEM, data);
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}
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#else
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void __init at91_add_device_eth(struct at91_ether_platform_data *data) {}
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#endif
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/* --------------------------------------------------------------------
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* NAND / SmartMedia
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_NAND_ATMEL)
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void __init at91_add_device_nand(struct atmel_nand_data *data)
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{
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unsigned int csa;
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if (!data)
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return;
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/* enable the address range of CS3 */
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csa = at91_sys_read(AT91_EBI_CSA);
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at91_sys_write(AT91_EBI_CSA, csa | AT91_EBI_CS3A_SMC_SMARTMEDIA);
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/* set the bus interface characteristics */
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at91_sys_write(AT91_SMC_CSR(3), AT91_SMC_ACSS_STD | AT91_SMC_DBW_8 | AT91_SMC_WSEN
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| AT91_SMC_NWS_(5)
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| AT91_SMC_TDF_(1)
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| AT91_SMC_RWSETUP_(0) /* tDS Data Set up Time 30 - ns */
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| AT91_SMC_RWHOLD_(1) /* tDH Data Hold Time 20 - ns */
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);
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/* enable pin */
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if (data->enable_pin)
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at91_set_gpio_output(data->enable_pin, 1);
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/* ready/busy pin */
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if (data->rdy_pin)
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at91_set_gpio_input(data->rdy_pin, 1);
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/* card detect pin */
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if (data->det_pin)
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at91_set_gpio_input(data->det_pin, 1);
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at91_set_A_periph(AT91_PIN_PC1, 0); /* SMOE */
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at91_set_A_periph(AT91_PIN_PC3, 0); /* SMWE */
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add_generic_device("atmel_nand", 0, NULL, AT91_CHIPSELECT_3, 0x10,
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IORESOURCE_MEM, data);
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}
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#else
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void __init at91_add_device_nand(struct atmel_nand_data *data) {}
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#endif
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/* --------------------------------------------------------------------
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* UART
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* -------------------------------------------------------------------- */
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static inline void configure_dbgu_pins(void)
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{
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at91_set_A_periph(AT91_PIN_PA30, 0); /* DRXD */
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at91_set_A_periph(AT91_PIN_PA31, 1); /* DTXD */
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}
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static inline void configure_usart0_pins(unsigned pins)
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{
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at91_set_A_periph(AT91_PIN_PA17, 1); /* TXD0 */
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at91_set_A_periph(AT91_PIN_PA18, 0); /* RXD0 */
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if (pins & ATMEL_UART_CTS)
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at91_set_A_periph(AT91_PIN_PA20, 0); /* CTS0 */
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if (pins & ATMEL_UART_RTS) {
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/*
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* AT91RM9200 Errata #39 - RTS0 is not internally connected to PA21.
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* We need to drive the pin manually. Default is off (RTS is active low).
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*/
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at91_set_gpio_output(AT91_PIN_PA21, 1);
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}
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}
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static inline void configure_usart1_pins(unsigned pins)
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{
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at91_set_A_periph(AT91_PIN_PB20, 1); /* TXD1 */
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at91_set_A_periph(AT91_PIN_PB21, 0); /* RXD1 */
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if (pins & ATMEL_UART_RI)
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at91_set_A_periph(AT91_PIN_PB18, 0); /* RI1 */
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if (pins & ATMEL_UART_DTR)
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at91_set_A_periph(AT91_PIN_PB19, 0); /* DTR1 */
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if (pins & ATMEL_UART_DCD)
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at91_set_A_periph(AT91_PIN_PB23, 0); /* DCD1 */
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if (pins & ATMEL_UART_CTS)
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at91_set_A_periph(AT91_PIN_PB24, 0); /* CTS1 */
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if (pins & ATMEL_UART_DSR)
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at91_set_A_periph(AT91_PIN_PB25, 0); /* DSR1 */
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if (pins & ATMEL_UART_RTS)
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at91_set_A_periph(AT91_PIN_PB26, 0); /* RTS1 */
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}
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static inline void configure_usart2_pins(unsigned pins)
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{
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at91_set_A_periph(AT91_PIN_PA22, 0); /* RXD2 */
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at91_set_A_periph(AT91_PIN_PA23, 1); /* TXD2 */
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if (pins & ATMEL_UART_CTS)
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at91_set_B_periph(AT91_PIN_PA30, 0); /* CTS2 */
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if (pins & ATMEL_UART_RTS)
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at91_set_B_periph(AT91_PIN_PA31, 0); /* RTS2 */
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}
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static inline void configure_usart3_pins(unsigned pins)
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{
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at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */
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at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */
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if (pins & ATMEL_UART_CTS)
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at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */
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if (pins & ATMEL_UART_RTS)
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at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */
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}
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void __init at91_register_uart(unsigned id, unsigned pins)
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{
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resource_size_t start;
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switch (id) {
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case 0: /* DBGU */
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configure_dbgu_pins();
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start = AT91_BASE_SYS + AT91_DBGU;
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id = 0;
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break;
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case AT91RM9200_ID_US0:
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configure_usart0_pins(pins);
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start = AT91RM9200_BASE_US0;
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id = 1;
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break;
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case AT91RM9200_ID_US1:
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configure_usart1_pins(pins);
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start = AT91RM9200_BASE_US1;
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id = 2;
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break;
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case AT91RM9200_ID_US2:
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configure_usart2_pins(pins);
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start = AT91RM9200_BASE_US2;
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id = 3;
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break;
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case AT91RM9200_ID_US3:
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configure_usart3_pins(pins);
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start = AT91RM9200_BASE_US3;
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id = 4;
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break;
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default:
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return;
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}
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add_generic_device("atmel_usart", id, NULL, start, 4096,
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IORESOURCE_MEM, NULL);
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}
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