335 lines
8.5 KiB
C
335 lines
8.5 KiB
C
/*
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* arch/arm/mach-at91/at91sam9263_devices.c
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*
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* Copyright (C) 2006 Atmel
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <common.h>
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#include <sizes.h>
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#include <asm/armlinux.h>
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#include <asm/hardware.h>
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#include <mach/at91_pmc.h>
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#include <mach/at91sam9g45_matrix.h>
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#include <mach/board.h>
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#include <mach/gpio.h>
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#include <mach/io.h>
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#include "generic.h"
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void at91_add_device_sdram(u32 size)
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{
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arm_add_mem_device("ram0", AT91_CHIPSELECT_6, size);
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}
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/* --------------------------------------------------------------------
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* USB Host (OHCI)
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_USB_OHCI)
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void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
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{
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int i;
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if (!data)
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return;
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/* Enable VBus control for UHP ports */
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for (i = 0; i < data->ports; i++) {
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if (data->vbus_pin[i])
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at91_set_gpio_output(data->vbus_pin[i], 0);
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}
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add_generic_device("at91_ohci", -1, NULL, AT91SAM9G45_OHCI_BASE, 1024 * 1024,
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IORESOURCE_MEM, data);
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}
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#else
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void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {}
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#endif
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#if defined(CONFIG_DRIVER_NET_MACB)
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void at91_add_device_eth(struct at91_ether_platform_data *data)
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{
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if (!data)
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return;
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/* Pins used for MII and RMII */
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at91_set_A_periph(AT91_PIN_PA17, 0); /* ETXCK_EREFCK */
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at91_set_A_periph(AT91_PIN_PA15, 0); /* ERXDV */
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at91_set_A_periph(AT91_PIN_PA12, 0); /* ERX0 */
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at91_set_A_periph(AT91_PIN_PA13, 0); /* ERX1 */
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at91_set_A_periph(AT91_PIN_PA16, 0); /* ERXER */
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at91_set_A_periph(AT91_PIN_PA14, 0); /* ETXEN */
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at91_set_A_periph(AT91_PIN_PA10, 0); /* ETX0 */
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at91_set_A_periph(AT91_PIN_PA11, 0); /* ETX1 */
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at91_set_A_periph(AT91_PIN_PA19, 0); /* EMDIO */
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at91_set_A_periph(AT91_PIN_PA18, 0); /* EMDC */
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if (!(data->flags & AT91SAM_ETHER_RMII)) {
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at91_set_B_periph(AT91_PIN_PA29, 0); /* ECRS */
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at91_set_B_periph(AT91_PIN_PA30, 0); /* ECOL */
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at91_set_B_periph(AT91_PIN_PA8, 0); /* ERX2 */
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at91_set_B_periph(AT91_PIN_PA9, 0); /* ERX3 */
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at91_set_B_periph(AT91_PIN_PA28, 0); /* ERXCK */
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at91_set_B_periph(AT91_PIN_PA6, 0); /* ETX2 */
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at91_set_B_periph(AT91_PIN_PA7, 0); /* ETX3 */
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at91_set_B_periph(AT91_PIN_PA27, 0); /* ETXER */
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}
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add_generic_device("macb", 0, NULL, AT91SAM9G45_BASE_EMAC, 0x1000,
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IORESOURCE_MEM, data);
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}
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#else
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void at91_add_device_eth(struct at91_ether_platform_data *data) {}
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#endif
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#if defined(CONFIG_NAND_ATMEL)
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static struct resource nand_resources[] = {
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[0] = {
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.start = AT91_CHIPSELECT_3,
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.size = SZ_256M,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = AT91_BASE_SYS + AT91_ECC,
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.size = 512,
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.flags = IORESOURCE_MEM,
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}
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};
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void at91_add_device_nand(struct atmel_nand_data *data)
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{
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unsigned long csa;
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if (!data)
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return;
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csa = at91_sys_read(AT91_MATRIX_EBICSA);
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at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
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/* enable pin */
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if (data->enable_pin)
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at91_set_gpio_output(data->enable_pin, 1);
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/* ready/busy pin */
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if (data->rdy_pin)
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at91_set_gpio_input(data->rdy_pin, 1);
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/* card detect pin */
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if (data->det_pin)
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at91_set_gpio_input(data->det_pin, 1);
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add_generic_device_res("atmel_nand", -1, nand_resources,
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ARRAY_SIZE(nand_resources), data);
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}
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#else
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void at91_add_device_nand(struct atmel_nand_data *data) {}
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#endif
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static inline void configure_dbgu_pins(void)
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{
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at91_set_A_periph(AT91_PIN_PB12, 0); /* DRXD */
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at91_set_A_periph(AT91_PIN_PB13, 1); /* DTXD */
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}
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static inline void configure_usart0_pins(unsigned pins)
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{
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at91_set_A_periph(AT91_PIN_PB19, 1); /* TXD0 */
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at91_set_A_periph(AT91_PIN_PB18, 0); /* RXD0 */
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if (pins & ATMEL_UART_RTS)
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at91_set_B_periph(AT91_PIN_PB17, 0); /* RTS0 */
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if (pins & ATMEL_UART_CTS)
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at91_set_B_periph(AT91_PIN_PB15, 0); /* CTS0 */
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}
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static inline void configure_usart1_pins(unsigned pins)
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{
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at91_set_A_periph(AT91_PIN_PB4, 1); /* TXD1 */
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at91_set_A_periph(AT91_PIN_PB5, 0); /* RXD1 */
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if (pins & ATMEL_UART_RTS)
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at91_set_A_periph(AT91_PIN_PD16, 0); /* RTS1 */
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if (pins & ATMEL_UART_CTS)
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at91_set_A_periph(AT91_PIN_PD17, 0); /* CTS1 */
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}
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static inline void configure_usart2_pins(unsigned pins)
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{
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at91_set_A_periph(AT91_PIN_PB6, 1); /* TXD2 */
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at91_set_A_periph(AT91_PIN_PB7, 0); /* RXD2 */
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if (pins & ATMEL_UART_RTS)
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at91_set_B_periph(AT91_PIN_PC9, 0); /* RTS2 */
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if (pins & ATMEL_UART_CTS)
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at91_set_B_periph(AT91_PIN_PC11, 0); /* CTS2 */
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}
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static inline void configure_usart3_pins(unsigned pins)
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{
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at91_set_A_periph(AT91_PIN_PB8, 1); /* TXD3 */
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at91_set_A_periph(AT91_PIN_PB9, 0); /* RXD3 */
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if (pins & ATMEL_UART_RTS)
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at91_set_B_periph(AT91_PIN_PA23, 0); /* RTS3 */
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if (pins & ATMEL_UART_CTS)
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at91_set_B_periph(AT91_PIN_PA24, 0); /* CTS3 */
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}
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void at91_register_uart(unsigned id, unsigned pins)
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{
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resource_size_t start;
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switch (id) {
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case 0: /* DBGU */
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configure_dbgu_pins();
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start = AT91_BASE_SYS + AT91_DBGU;
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id = 0;
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break;
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case AT91SAM9G45_ID_US0:
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configure_usart0_pins(pins);
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start = AT91SAM9G45_BASE_US0;
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id = 1;
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break;
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case AT91SAM9G45_ID_US1:
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configure_usart1_pins(pins);
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start = AT91SAM9G45_BASE_US1;
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id = 2;
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break;
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case AT91SAM9G45_ID_US2:
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configure_usart2_pins(pins);
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start = AT91SAM9G45_BASE_US2;
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id = 3;
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break;
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case AT91SAM9G45_ID_US3:
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configure_usart3_pins(pins);
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start = AT91SAM9G45_BASE_US3;
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id = 4;
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break;
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default:
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return;
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}
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add_generic_device("atmel_usart", id, NULL, start, 4096,
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IORESOURCE_MEM, NULL);
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}
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#if defined(CONFIG_MCI_ATMEL)
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/* Consider only one slot : slot 0 */
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void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data)
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{
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resource_size_t start;
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if (!data)
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return;
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/* need bus_width */
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if (!data->bus_width)
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return;
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/* input/irq */
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if (data->detect_pin) {
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at91_set_gpio_input(data->detect_pin, 1);
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at91_set_deglitch(data->detect_pin, 1);
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}
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if (data->wp_pin)
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at91_set_gpio_input(data->wp_pin, 1);
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if (mmc_id == 0) { /* MCI0 */
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start = AT91SAM9G45_BASE_MCI0;
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/* CLK */
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at91_set_A_periph(AT91_PIN_PA0, 0);
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/* CMD */
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at91_set_A_periph(AT91_PIN_PA1, 1);
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/* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */
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at91_set_A_periph(AT91_PIN_PA2, 1);
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if (data->bus_width >= 4) {
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at91_set_A_periph(AT91_PIN_PA3, 1);
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at91_set_A_periph(AT91_PIN_PA4, 1);
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at91_set_A_periph(AT91_PIN_PA5, 1);
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if (data->bus_width == 8) {
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at91_set_A_periph(AT91_PIN_PA6, 1);
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at91_set_A_periph(AT91_PIN_PA7, 1);
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at91_set_A_periph(AT91_PIN_PA8, 1);
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at91_set_A_periph(AT91_PIN_PA9, 1);
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}
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}
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} else { /* MCI1 */
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start = AT91SAM9G45_BASE_MCI1;
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/* CLK */
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at91_set_A_periph(AT91_PIN_PA31, 0);
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/* CMD */
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at91_set_A_periph(AT91_PIN_PA22, 1);
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/* DAT0, maybe DAT1..DAT3 and maybe DAT4..DAT7 */
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at91_set_A_periph(AT91_PIN_PA23, 1);
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if (data->bus_width >= 4) {
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at91_set_A_periph(AT91_PIN_PA24, 1);
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at91_set_A_periph(AT91_PIN_PA25, 1);
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at91_set_A_periph(AT91_PIN_PA26, 1);
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if (data->bus_width == 8) {
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at91_set_A_periph(AT91_PIN_PA27, 1);
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at91_set_A_periph(AT91_PIN_PA28, 1);
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at91_set_A_periph(AT91_PIN_PA29, 1);
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at91_set_A_periph(AT91_PIN_PA30, 1);
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}
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}
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}
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add_generic_device("atmel_mci", mmc_id, NULL, start, 4096,
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IORESOURCE_MEM, data);
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}
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#else
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void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data) {}
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#endif
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#if defined(CONFIG_DRIVER_SPI_ATMEL)
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/* SPI */
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void at91_add_device_spi(int spi_id, struct at91_spi_platform_data *pdata)
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{
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int i;
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int cs_pin;
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resource_size_t start;
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for (i = 0; i < pdata->num_chipselect; i++) {
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cs_pin = pdata->chipselect[i];
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/* enable chip-select pin */
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if (cs_pin > 0)
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at91_set_gpio_output(cs_pin, 1);
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}
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/* Configure SPI bus(es) */
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if (spi_id == 0) {
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start = AT91SAM9G45_BASE_SPI0;
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at91_set_A_periph(AT91_PIN_PB0, 0); /* SPI0_MISO */
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at91_set_A_periph(AT91_PIN_PB1, 0); /* SPI0_MOSI */
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at91_set_A_periph(AT91_PIN_PB2, 0); /* SPI0_SPCK */
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add_generic_device("atmel_spi", spi_id, NULL, start, SZ_16K,
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IORESOURCE_MEM, pdata);
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}
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else if (spi_id == 1) {
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start = AT91SAM9G45_BASE_SPI1;
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at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_MISO */
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at91_set_A_periph(AT91_PIN_PB15, 0); /* SPI1_MOSI */
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at91_set_A_periph(AT91_PIN_PB16, 0); /* SPI1_SPCK */
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add_generic_device("atmel_spi", spi_id, NULL, start, SZ_16K,
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IORESOURCE_MEM, pdata);
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}
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}
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#else
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void at91_add_device_spi(int spi_id, struct at91_spi_platform_data *pdata) {}
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#endif
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