The regular ns16450/ns16550 devices get the console name "ttyS" under Linux. Add this to the driver data. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
520 lines
12 KiB
C
520 lines
12 KiB
C
/**
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* @file
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* @brief NS16550 Driver implementation
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*
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* FileName: drivers/serial/serial_ns16550.c
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*
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* NS16550 support
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* Modified from u-boot drivers/serial.c and drivers/ns16550.c
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* originally from linux source (arch/ppc/boot/ns16550.c)
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* modified to use CFG_ISA_MEM and new defines
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*/
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/*
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* (C) Copyright 2008
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* Texas Instruments, <www.ti.com>
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* Nishanth Menon <x0nishan@ti.com>
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*
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* (C) Copyright 2000
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* Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <driver.h>
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#include <init.h>
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#include <errno.h>
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#include <malloc.h>
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#include <io.h>
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#include <linux/clk.h>
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#include "serial_ns16550.h"
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#include <ns16550.h>
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struct ns16550_priv {
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struct console_device cdev;
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struct NS16550_plat plat;
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struct clk *clk;
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uint32_t fcrval;
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void __iomem *mmiobase;
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unsigned iobase;
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void (*write_reg)(struct ns16550_priv *, uint8_t val, unsigned offset);
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uint8_t (*read_reg)(struct ns16550_priv *, unsigned offset);
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};
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struct ns16550_drvdata {
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void (*init_port)(struct console_device *cdev);
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const char *linux_console_name;
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};
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static inline struct ns16550_priv *to_ns16550_priv(struct console_device *cdev)
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{
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return container_of(cdev, struct ns16550_priv, cdev);
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}
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static uint8_t ns16550_read_reg_mmio_8(struct ns16550_priv *priv, unsigned offset)
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{
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return readb(priv->mmiobase + offset);
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}
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static void ns16550_write_reg_mmio_8(struct ns16550_priv *priv, uint8_t val, unsigned offset)
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{
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writeb(val, priv->mmiobase + offset);
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}
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static uint8_t ns16550_read_reg_mmio_16(struct ns16550_priv *priv, unsigned offset)
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{
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return readw(priv->mmiobase + offset);
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}
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static void ns16550_write_reg_mmio_16(struct ns16550_priv *priv, uint8_t val, unsigned offset)
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{
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writew(val, priv->mmiobase + offset);
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}
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static uint8_t ns16550_read_reg_mmio_32(struct ns16550_priv *priv, unsigned offset)
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{
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return readl(priv->mmiobase + offset);
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}
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static void ns16550_write_reg_mmio_32(struct ns16550_priv *priv, uint8_t val, unsigned offset)
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{
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writel(val, priv->mmiobase + offset);
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}
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static uint8_t ns16550_read_reg_ioport_8(struct ns16550_priv *priv, unsigned offset)
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{
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return inb(priv->iobase + offset);
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}
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static void ns16550_write_reg_ioport_8(struct ns16550_priv *priv, uint8_t val, unsigned offset)
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{
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outb(val, priv->iobase + offset);
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}
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static uint8_t ns16550_read_reg_ioport_16(struct ns16550_priv *priv, unsigned offset)
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{
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return inw(priv->iobase + offset);
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}
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static void ns16550_write_reg_ioport_16(struct ns16550_priv *priv, uint8_t val, unsigned offset)
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{
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outw(val, priv->iobase + offset);
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}
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static uint8_t ns16550_read_reg_ioport_32(struct ns16550_priv *priv, unsigned offset)
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{
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return inl(priv->iobase + offset);
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}
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static void ns16550_write_reg_ioport_32(struct ns16550_priv *priv, uint8_t val, unsigned offset)
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{
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outl(val, priv->iobase + offset);
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}
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/**
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* @brief read register
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*
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* @param[in] cdev pointer to console device
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* @param[in] offset
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*
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* @return value
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*/
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static uint32_t ns16550_read(struct console_device *cdev, uint32_t off)
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{
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struct ns16550_priv *priv = to_ns16550_priv(cdev);
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struct NS16550_plat *plat = &priv->plat;
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return priv->read_reg(priv, off << plat->shift);
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}
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/**
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* @brief write register
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*
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* @param[in] cdev pointer to console device
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* @param[in] offset
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* @param[in] val
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*/
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static void ns16550_write(struct console_device *cdev, uint32_t val,
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uint32_t off)
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{
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struct ns16550_priv *priv = to_ns16550_priv(cdev);
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struct NS16550_plat *plat = &priv->plat;
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priv->write_reg(priv, val, off << plat->shift);
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}
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/**
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* @brief Compute the divisor for a baud rate
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*
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* @param[in] cdev pointer to console device
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* @param[in] baudrate baud rate
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*
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* @return divisor to be set
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*/
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static inline unsigned int ns16550_calc_divisor(struct console_device *cdev,
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unsigned int baudrate)
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{
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struct ns16550_priv *priv = to_ns16550_priv(cdev);
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struct NS16550_plat *plat = &priv->plat;
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unsigned int clk = plat->clock;
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return (clk / MODE_X_DIV / baudrate);
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}
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/**
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* @brief Set the baudrate for the uart port
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*
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* @param[in] cdev console device
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* @param[in] baud_rate baud rate to set
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*
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* @return 0-implied to support the baudrate
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*/
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static int ns16550_setbaudrate(struct console_device *cdev, int baud_rate)
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{
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unsigned int baud_divisor = ns16550_calc_divisor(cdev, baud_rate);
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struct ns16550_priv *priv = to_ns16550_priv(cdev);
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ns16550_write(cdev, LCR_BKSE, lcr);
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ns16550_write(cdev, baud_divisor & 0xff, dll);
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ns16550_write(cdev, (baud_divisor >> 8) & 0xff, dlm);
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ns16550_write(cdev, LCRVAL, lcr);
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ns16550_write(cdev, MCRVAL, mcr);
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ns16550_write(cdev, priv->fcrval, fcr);
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return 0;
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}
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/**
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* @brief Initialize the device
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*
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* @param[in] cdev pointer to console device
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*/
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static void ns16550_serial_init_port(struct console_device *cdev)
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{
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/* initializing the device for the first time */
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ns16550_write(cdev, 0x00, lcr); /* select ier reg */
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ns16550_write(cdev, 0x00, ier);
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}
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static void ns16450_serial_init_port(struct console_device *cdev)
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{
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struct ns16550_priv *priv = to_ns16550_priv(cdev);
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priv->fcrval &= ~FCR_FIFO_EN;
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ns16550_serial_init_port(cdev);
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}
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#define omap_mdr1 8
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static void ns16550_omap_init_port(struct console_device *cdev)
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{
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struct ns16550_priv *priv = to_ns16550_priv(cdev);
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priv->plat.shift = 2;
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ns16550_serial_init_port(cdev);
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ns16550_write(cdev, 0x07, omap_mdr1); /* Disable */
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ns16550_write(cdev, 0x00, omap_mdr1);
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}
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#define JZ_FCR_UME 0x10 /* Uart Module Enable */
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static void ns16550_jz_init_port(struct console_device *cdev)
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{
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struct ns16550_priv *priv = to_ns16550_priv(cdev);
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priv->fcrval |= JZ_FCR_UME;
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ns16550_serial_init_port(cdev);
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}
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/*********** Exposed Functions **********************************/
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/**
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* @brief Put a character to the serial port
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*
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* @param[in] cdev pointer to console device
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* @param[in] c character to put
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*/
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static void ns16550_putc(struct console_device *cdev, char c)
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{
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/* Loop Doing Nothing */
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while ((ns16550_read(cdev, lsr) & LSR_THRE) == 0) ;
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ns16550_write(cdev, c, thr);
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}
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/**
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* @brief Retrieve a character from serial port
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*
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* @param[in] cdev pointer to console device
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*
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* @return return the character read
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*/
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static int ns16550_getc(struct console_device *cdev)
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{
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/* Loop Doing Nothing */
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while ((ns16550_read(cdev, lsr) & LSR_DR) == 0) ;
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return ns16550_read(cdev, rbr);
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}
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/**
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* @brief Test if character is available
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*
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* @param[in] cdev pointer to console device
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*
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* @return - status based on data availability
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*/
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static int ns16550_tstc(struct console_device *cdev)
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{
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return ((ns16550_read(cdev, lsr) & LSR_DR) != 0);
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}
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static void ns16550_probe_dt(struct device_d *dev, struct ns16550_priv *priv)
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{
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struct device_node *np = dev->device_node;
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if (!IS_ENABLED(CONFIG_OFDEVICE))
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return;
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of_property_read_u32(np, "clock-frequency", &priv->plat.clock);
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of_property_read_u32(np, "reg-shift", &priv->plat.shift);
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}
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static struct ns16550_drvdata ns16450_drvdata = {
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.init_port = ns16450_serial_init_port,
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.linux_console_name = "ttyS",
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};
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static struct ns16550_drvdata ns16550_drvdata = {
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.init_port = ns16550_serial_init_port,
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.linux_console_name = "ttyS",
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};
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static __maybe_unused struct ns16550_drvdata omap_drvdata = {
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.init_port = ns16550_omap_init_port,
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.linux_console_name = "ttyO",
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};
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static __maybe_unused struct ns16550_drvdata jz_drvdata = {
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.init_port = ns16550_jz_init_port,
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};
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static __maybe_unused struct ns16550_drvdata tegra_drvdata = {
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.init_port = ns16550_serial_init_port,
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.linux_console_name = "ttyS",
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};
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static int ns16550_init_iomem(struct device_d *dev, struct ns16550_priv *priv)
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{
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struct resource *res;
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int width;
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res = dev_get_resource(dev, IORESOURCE_MEM, 0);
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if (IS_ERR(res))
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return PTR_ERR(res);
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priv->mmiobase = dev_request_mem_region(dev, 0);
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if (IS_ERR(priv->mmiobase))
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return PTR_ERR(priv->mmiobase);
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width = res->flags & IORESOURCE_MEM_TYPE_MASK;
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switch (width) {
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case IORESOURCE_MEM_8BIT:
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priv->read_reg = ns16550_read_reg_mmio_8;
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priv->write_reg = ns16550_write_reg_mmio_8;
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break;
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case IORESOURCE_MEM_16BIT:
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priv->read_reg = ns16550_read_reg_mmio_16;
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priv->write_reg = ns16550_write_reg_mmio_16;
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break;
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case IORESOURCE_MEM_32BIT:
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priv->read_reg = ns16550_read_reg_mmio_32;
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priv->write_reg = ns16550_write_reg_mmio_32;
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break;
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}
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return 0;
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}
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static int ns16550_init_ioport(struct device_d *dev, struct ns16550_priv *priv)
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{
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struct resource *res;
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int width;
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res = dev_get_resource(dev, IORESOURCE_IO, 0);
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if (IS_ERR(res))
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return PTR_ERR(res);
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res = request_ioport_region(dev_name(dev), res->start, res->end);
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if (IS_ERR(res))
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return PTR_ERR(res);
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priv->iobase = res->start;
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width = res->flags & IORESOURCE_MEM_TYPE_MASK;
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switch (width) {
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case IORESOURCE_MEM_8BIT:
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priv->read_reg = ns16550_read_reg_ioport_8;
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priv->write_reg = ns16550_write_reg_ioport_8;
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break;
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case IORESOURCE_MEM_16BIT:
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priv->read_reg = ns16550_read_reg_ioport_16;
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priv->write_reg = ns16550_write_reg_ioport_16;
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break;
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case IORESOURCE_MEM_32BIT:
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priv->read_reg = ns16550_read_reg_ioport_32;
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priv->write_reg = ns16550_write_reg_ioport_32;
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break;
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}
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return 0;
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}
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/**
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* @brief Probe entry point -called on the first match for device
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*
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* @param[in] dev matched device
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*
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* @return EINVAL if platform_data is not populated,
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* ENOMEM if calloc failed
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* else return result of console_register
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*/
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static int ns16550_probe(struct device_d *dev)
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{
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struct ns16550_priv *priv;
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struct console_device *cdev;
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struct NS16550_plat *plat = (struct NS16550_plat *)dev->platform_data;
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struct ns16550_drvdata *devtype;
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int ret;
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ret = dev_get_drvdata(dev, (const void **)&devtype);
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if (ret)
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devtype = &ns16550_drvdata;
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priv = xzalloc(sizeof(*priv));
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ret = ns16550_init_iomem(dev, priv);
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if (ret)
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ret = ns16550_init_ioport(dev, priv);
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if (ret)
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return ret;
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if (plat)
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priv->plat = *plat;
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else
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ns16550_probe_dt(dev, priv);
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if (!priv->plat.clock) {
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priv->clk = clk_get(dev, NULL);
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if (IS_ERR(priv->clk)) {
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ret = PTR_ERR(priv->clk);
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goto err;
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}
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clk_enable(priv->clk);
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priv->plat.clock = clk_get_rate(priv->clk);
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}
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if (priv->plat.clock == 0) {
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dev_err(dev, "no valid clockrate\n");
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ret = -EINVAL;
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goto err;
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}
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cdev = &priv->cdev;
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cdev->dev = dev;
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cdev->tstc = ns16550_tstc;
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cdev->putc = ns16550_putc;
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cdev->getc = ns16550_getc;
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cdev->setbrg = ns16550_setbaudrate;
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cdev->linux_console_name = devtype->linux_console_name;
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priv->fcrval = FCRVAL;
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devtype->init_port(cdev);
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return console_register(cdev);
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err:
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free(priv);
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return ret;
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}
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static struct of_device_id ns16550_serial_dt_ids[] = {
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{
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.compatible = "ns16450",
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.data = &ns16450_drvdata,
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}, {
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.compatible = "ns16550a",
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.data = &ns16550_drvdata,
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}, {
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.compatible = "snps,dw-apb-uart",
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.data = &ns16550_drvdata,
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},
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#if IS_ENABLED(CONFIG_ARCH_OMAP)
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{
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.compatible = "ti,omap2-uart",
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.data = &omap_drvdata,
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}, {
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.compatible = "ti,omap3-uart",
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.data = &omap_drvdata,
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}, {
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.compatible = "ti,omap4-uart",
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.data = &omap_drvdata,
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},
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#endif
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#if IS_ENABLED(CONFIG_ARCH_TEGRA)
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{
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.compatible = "nvidia,tegra20-uart",
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.data = &tegra_drvdata,
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},
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#endif
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#if IS_ENABLED(CONFIG_MACH_MIPS_XBURST)
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{
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.compatible = "ingenic,jz4740-uart",
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.data = &jz_drvdata,
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},
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#endif
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{
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/* sentinel */
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},
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};
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static __maybe_unused struct platform_device_id ns16550_serial_ids[] = {
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{
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.name = "omap-uart",
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.driver_data = (unsigned long)&omap_drvdata,
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}, {
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/* sentinel */
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},
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};
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/**
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* @brief Driver registration structure
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*/
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static struct driver_d ns16550_serial_driver = {
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.name = "ns16550_serial",
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.probe = ns16550_probe,
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.of_compatible = DRV_OF_COMPAT(ns16550_serial_dt_ids),
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#if IS_ENABLED(CONFIG_ARCH_OMAP)
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.id_table = ns16550_serial_ids,
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#endif
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};
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console_platform_driver(ns16550_serial_driver);
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