118 lines
2.8 KiB
C
118 lines
2.8 KiB
C
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <init.h>
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#include <clock.h>
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#include <notifier.h>
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#include <mach/imx-regs.h>
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#include <mach/clock.h>
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#include <asm/io.h>
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#define GPT(x) __REG(IMX_TIM1_BASE + (x))
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#define timer_base (IMX_TIM1_BASE)
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uint64_t imx_clocksource_read(void)
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{
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return readl(timer_base + GPT_TCN);
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}
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static struct clocksource cs = {
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.read = imx_clocksource_read,
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.mask = 0xffffffff,
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.shift = 10,
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};
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static int imx_clocksource_clock_change(struct notifier_block *nb, unsigned long event, void *data)
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{
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cs.mult = clocksource_hz2mult(imx_get_gptclk(), cs.shift);
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return 0;
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}
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static struct notifier_block imx_clock_notifier = {
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.notifier_call = imx_clocksource_clock_change,
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};
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static int clocksource_init (void)
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{
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int i;
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uint32_t val;
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/* setup GP Timer 1 */
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writel(TCTL_SWR, timer_base + GPT_TCTL);
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#ifdef CONFIG_ARCH_IMX21
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PCCR1 |= PCCR1_GPT1_EN;
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#endif
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#ifdef CONFIG_ARCH_IMX27
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PCCR0 |= PCCR0_GPT1_EN;
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PCCR1 |= PCCR1_PERCLK1_EN;
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#endif
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for (i = 0; i < 100; i++)
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writel(0, timer_base + GPT_TCTL); /* We have no udelay by now */
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writel(0, timer_base + GPT_TPRER);
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val = readl(timer_base + GPT_TCTL);
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val |= TCTL_FRR | (1 << TCTL_CLKSOURCE) | TCTL_TEN; /* Freerun Mode, PERCLK1 input */
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writel(val, timer_base + GPT_TCTL);
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cs.mult = clocksource_hz2mult(imx_get_gptclk(), cs.shift);
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init_clock(&cs);
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clock_register_client(&imx_clock_notifier);
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return 0;
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}
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core_initcall(clocksource_init);
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/*
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* Reset the cpu by setting up the watchdog timer and let it time out
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*/
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void __noreturn reset_cpu (unsigned long ignored)
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{
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/* Disable watchdog and set Time-Out field to 0 */
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WCR = 0x0000;
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/* Write Service Sequence */
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WSR = 0x5555;
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WSR = 0xAAAA;
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/* Enable watchdog */
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WCR = WCR_WDE;
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while (1);
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/*NOTREACHED*/
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}
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EXPORT_SYMBOL(reset_cpu);
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