123 lines
2.9 KiB
C
123 lines
2.9 KiB
C
/*
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* Copyright (C) 2013 Sascha Hauer, Pengutronix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation.
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*
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*/
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#define pr_fmt(fmt) "dfi-fs700-m60: " fmt
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#include <generated/mach-types.h>
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#include <environment.h>
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#include <bootsource.h>
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#include <globalvar.h>
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#include <common.h>
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#include <sizes.h>
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#include <envfs.h>
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#include <init.h>
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#include <gpio.h>
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#include <net.h>
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#include <linux/phy.h>
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#include <asm/armlinux.h>
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#include <asm/memory.h>
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#include <asm/mmu.h>
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#include <asm/io.h>
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#include <mach/imx6-regs.h>
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#include <mach/generic.h>
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#include <mach/bbu.h>
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/*
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* This board can have 512MiB, 1GiB or 2GiB of SDRAM. The actual amount of SDRAM
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* is detected using mirror detection in lowlevel init and is stored in the first
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* SDRAM address from the lowlevel code.
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*/
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static int dfi_fs700_m60_mem_init(void)
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{
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u32 memsize;
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if (!of_machine_is_compatible("dfi,fs700-m60"))
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return 0;
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memsize = *(u32 *)0x10000000;
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/* play safe if we find some corrupted amount of SDRAM */
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switch (memsize) {
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case SZ_512M:
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case SZ_1G:
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case SZ_2G:
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break;
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default:
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pr_err("unknown SDRAM size 0x%08x defaulting to 512MiB\n", memsize);
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memsize = SZ_512M;
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}
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arm_add_mem_device("ram0", 0x10000000, memsize);
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return 0;
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}
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mem_initcall(dfi_fs700_m60_mem_init);
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static int ar8031_phy_fixup(struct phy_device *dev)
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{
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u16 val;
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/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
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phy_write(dev, 0xd, 0x7);
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phy_write(dev, 0xe, 0x8016);
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phy_write(dev, 0xd, 0x4007);
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val = phy_read(dev, 0xe);
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val &= 0xffe3;
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val |= 0x18;
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phy_write(dev, 0xe, val);
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/* introduce tx clock delay */
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phy_write(dev, 0x1d, 0x5);
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val = phy_read(dev, 0x1e);
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val |= 0x0100;
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phy_write(dev, 0x1e, val);
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return 0;
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}
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#define PHY_ID_AR8031 0x004dd074
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#define AR_PHY_ID_MASK 0xffffffff
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static int dfi_fs700_m60_init(void)
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{
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unsigned flag_spi = 0, flag_mmc = 0;
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if (!of_machine_is_compatible("dfi,fs700-m60"))
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return 0;
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phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, ar8031_phy_fixup);
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if (bootsource_get() == BOOTSOURCE_SPI)
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flag_spi |= BBU_HANDLER_FLAG_DEFAULT;
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else
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flag_mmc |= BBU_HANDLER_FLAG_DEFAULT;
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imx6_bbu_internal_mmc_register_handler("mmc", "/dev/mmc3.boot0",
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flag_mmc);
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imx6_bbu_internal_spi_i2c_register_handler("spiflash", "/dev/m25p0",
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flag_spi);
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armlinux_set_architecture(MACH_TYPE_MX6Q_SABRESD);
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return 0;
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}
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device_initcall(dfi_fs700_m60_init);
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