75 lines
1.9 KiB
Plaintext
75 lines
1.9 KiB
Plaintext
/*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* Copyright 2011 Linaro Ltd.
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <arm/imx51-babbage.dts>
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/ {
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chosen {
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stdout-path = &uart1;
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environment@0 {
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compatible = "barebox,environment";
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device-path = &esdhc1, "partname:barebox-environment";
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};
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};
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};
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&esdhc1 {
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "barebox-environment";
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reg = <0x80000 0x20000>;
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};
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};
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&iim {
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barebox,provide-mac-address = <&fec 1 9>;
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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imx51-babbage {
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pinctrl_fec: fecgrp {
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/*
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* Overwrite upstream FEC iomux settings since these currently
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* have NO_PAD_CTRL instead of real settings. Remove this once
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* this is fixed upstream.
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*/
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fsl,pins = <
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MX51_PAD_EIM_EB2__FEC_MDIO 0x000001f5
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MX51_PAD_EIM_EB3__FEC_RDATA1 0x00000085
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MX51_PAD_EIM_CS2__FEC_RDATA2 0x00000085
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MX51_PAD_EIM_CS3__FEC_RDATA3 0x00000085
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MX51_PAD_EIM_CS4__FEC_RX_ER 0x00000180
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MX51_PAD_EIM_CS5__FEC_CRS 0x00000180
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MX51_PAD_NANDF_RB2__FEC_COL 0x00000180
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MX51_PAD_NANDF_RB3__FEC_RX_CLK 0x00000180
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MX51_PAD_NANDF_D9__FEC_RDATA0 0x00002180
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MX51_PAD_NANDF_D8__FEC_TDATA0 0x00002004
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MX51_PAD_NANDF_CS2__FEC_TX_ER 0x00002004
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MX51_PAD_NANDF_CS3__FEC_MDC 0x00002004
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MX51_PAD_NANDF_CS4__FEC_TDATA1 0x00002004
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MX51_PAD_NANDF_CS5__FEC_TDATA2 0x00002004
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MX51_PAD_NANDF_CS6__FEC_TDATA3 0x00002004
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MX51_PAD_NANDF_CS7__FEC_TX_EN 0x00002004
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MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK 0x00002180
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MX51_PAD_NANDF_D11__FEC_RX_DV 0x000020a4
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MX51_PAD_EIM_A20__GPIO2_14 0x00000085 /* Phy Reset */
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>;
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};
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};
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};
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