395 lines
8.9 KiB
Plaintext
395 lines
8.9 KiB
Plaintext
/*
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* Copyright (C) 2014 Eric Bénard - Eukréa Electromatique
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*
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* The code contained herein is licensed under the GNU General Public
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* License version 2.
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*/
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/dts-v1/;
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#include "imx6dl.dtsi"
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/ {
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model = "RIoTboard Solo";
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compatible = "embest,riotboard", "fsl,imx6dl";
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chosen {
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linux,stdout-path = &uart2;
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environment@0 {
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compatible = "barebox,environment";
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device-path = &usdhc4, "partname:barebox-environment";
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};
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};
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memory {
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reg = <0x10000000 0x40000000>;
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};
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gpio-leds {
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compatible = "gpio-leds";
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d45 {
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label = "d45";
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gpios = <&gpio5 2 1>;
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linux,default-trigger = "heartbeat";
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};
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d46 {
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label = "d46";
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gpios = <&gpio3 28 1>;
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linux,default-trigger = "default-on";
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};
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};
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regulators {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <0>;
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reg_3p3v: regulator@1 {
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compatible = "regulator-fixed";
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reg = <1>;
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regulator-name = "3P3V";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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&iomuxc {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hog>;
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imx6s-riotboard {
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pinctrl_hog: hoggrp {
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fsl,pins = <
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MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* LED D45 */
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MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x80000000 /* LED D46 */
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MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x80000000 /* PMIC_INT_B */
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MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x030b0 /* CAM_MCLK + SGTL_MCLK */
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>;
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};
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pinctrl_uart2: uart2grp {
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fsl,pins = <
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MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
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MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
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>;
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};
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pinctrl_rgmii_ar8035: rgmii_ar8035 {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
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MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
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/* AR8035 reset */
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MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x130b0
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/* AR8035 interrupt */
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MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000
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/* GPIO16 -> AR8035 25MHz */
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MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0xc0000000
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MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x80000000
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MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
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MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
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MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
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MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
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MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
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/* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
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MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0a0b1
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/* AR8035 pin strapping: IO voltage: pull up */
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MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
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/* AR8035 pin strapping: PHYADDR#0: pull down */
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MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x130b0
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/* AR8035 pin strapping: PHYADDR#1: pull down */
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MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x130b0
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/* AR8035 pin strapping: MODE#1: pull up */
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MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
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/* AR8035 pin strapping: MODE#3: pull up */
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MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
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/* AR8035 pin strapping: MODE#0: pull down */
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MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x130b0
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>;
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};
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pinctrl_usdhc4: usdhc4grp {
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fsl,pins = <
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MX6QDL_PAD_SD4_CLK__SD4_CLK 0x80000000
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MX6QDL_PAD_SD4_CMD__SD4_CMD 0x80000000
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MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x80000000
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MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x80000000
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MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x80000000
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MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x80000000
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX6QDL_PAD_SD2_CLK__SD2_CLK 0x80000000
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MX6QDL_PAD_SD2_CMD__SD2_CMD 0x80000000
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MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x80000000
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MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x80000000
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MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x80000000
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MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x80000000
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MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
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MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX6QDL_PAD_SD3_CMD__SD3_CMD 0x80000000
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MX6QDL_PAD_SD3_CLK__SD3_CLK 0x80000000
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MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x80000000
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MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x80000000
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MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x80000000
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MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x80000000
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MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x80000000
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MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
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>;
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};
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pinctrl_usbotg: usbotggrp {
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fsl,pins = <
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MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x80000000
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MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x80000000
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MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x80000000
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>;
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};
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pinctrl_i2c1_2: i2c1grp-2 {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
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MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c2_2: i2c2grp-2 {
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fsl,pins = <
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MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
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MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c3_2: i2c3grp-2 {
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fsl,pins = <
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MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
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MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
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>;
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};
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pinctrl_i2c4_2: i2c4grp-2 {
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fsl,pins = <
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MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1
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MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1
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>;
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};
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};
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};
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&uart2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart2>;
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status = "okay";
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_rgmii_ar8035>;
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phy-mode = "rgmii";
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phy-reset-duration = <2>;
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phy-reset-gpios = <&gpio3 31 0>;
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status = "okay";
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};
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&usdhc2 {
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/* SD card socket - bottom */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc2>;
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bus-width = <4>;
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cd-gpios = <&gpio1 4 0>;
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wp-gpios = <&gpio1 2 0>;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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&usdhc3 {
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/* uSD card socket - top */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc3>;
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bus-width = <4>;
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cd-gpios = <&gpio7 0 0>;
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wp-gpios = <&gpio7 1 0>;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <1>;
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};
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&usdhc4 {
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/* eMMC */
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc4>;
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bus-width = <4>;
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non-removable;
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status = "okay";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "barebox";
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reg = <0x0 0x80000>;
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};
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partition@1 {
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label = "barebox-environment";
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reg = <0x80000 0x80000>;
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};
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};
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&usbh1 {
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status = "okay";
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phy_type = "utmi";
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disable-over-current;
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};
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&usbotg {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usbotg>;
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phy_type = "utmi";
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dr_mode = "peripheral";
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otg_id_pin_select_change;
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1_2>;
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pmic: pf0100@08 {
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compatible = "pf0100-regulator";
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reg = <0x08>;
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interrupt-parent = <&gpio5>;
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interrupts = <16 8>;
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regulators {
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reg_vddcore: sw1ab {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-always-on;
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};
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reg_vddsoc: sw1c {
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regulator-min-microvolt = <300000>;
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regulator-max-microvolt = <1875000>;
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regulator-always-on;
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};
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reg_gen_3v3: sw2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_ddr_1v5a: sw3a {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-always-on;
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};
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reg_ddr_1v5b: sw3b {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-always-on;
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};
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reg_ddr_vtt: sw4 {
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regulator-min-microvolt = <400000>;
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regulator-max-microvolt = <1975000>;
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regulator-always-on;
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};
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reg_5v_600mA: swbst {
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5150000>;
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regulator-always-on;
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};
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reg_snvs_3v: vsnvs {
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regulator-min-microvolt = <1500000>;
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regulator-max-microvolt = <3000000>;
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regulator-always-on;
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};
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reg_vrefddr: vrefddr {
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regulator-min-microvolt = <750000>;
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regulator-max-microvolt = <750000>;
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regulator-always-on;
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};
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reg_vgen1_1v5: vgen1 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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/* not used */
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};
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reg_vgen2_1v2_eth: vgen2 {
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regulator-min-microvolt = <800000>;
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regulator-max-microvolt = <1550000>;
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regulator-always-on;
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};
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reg_vgen3_2v8: vgen3 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_vgen4_1v8: vgen4 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_vgen5_2v5_sgtl: vgen5 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_vgen6_3v3: vgen6 {
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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};
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};
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codec: sgtl5000@0a {
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compatible = "fsl,sgtl5000";
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reg = <0x0a>;
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clocks = <&clks 201>;
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VDDA-supply = <®_vgen5_2v5_sgtl>;
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VDDIO-supply = <®_3p3v>;
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};
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};
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&i2c2 {
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status = "okay";
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c2_2>;
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};
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&i2c3 {
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status = "okay";
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3_2>;
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};
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&i2c4 {
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status = "okay";
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c4_2>;
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};
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&ocotp {
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barebox,provide-mac-address = <&fec 0x620>;
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};
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