205 lines
5.3 KiB
C
205 lines
5.3 KiB
C
/*
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* Copyright (C) 2009 Juergen Beisert, Pengutronix
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*
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*/
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/**
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* @file
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* @brief a9m2410 Specific Board Initialization routines
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*
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*/
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#include <common.h>
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#include <driver.h>
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#include <init.h>
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#include <asm/armlinux.h>
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#include <generated/mach-types.h>
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#include <asm-generic/sections.h>
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#include <partition.h>
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#include <nand.h>
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#include <io.h>
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#include <mach/devices-s3c24xx.h>
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#include <mach/s3c-iomap.h>
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#include <mach/s3c24xx-nand.h>
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#include <mach/s3c-generic.h>
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#include <mach/s3c-busctl.h>
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#include <mach/s3c24xx-gpio.h>
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// {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
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static struct s3c24x0_nand_platform_data nand_info = {
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.nand_timing = CALC_NFCONF_TIMING(A9M2410_TACLS, A9M2410_TWRPH0, A9M2410_TWRPH1)
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};
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static int a9m2410_mem_init(void)
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{
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resource_size_t size;
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/*
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* Note: On this card the second SDRAM page is not used
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*/
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s3c24xx_disable_second_sdram_bank();
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size = s3c24xx_get_memory_size();
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/* ---------- configure the GPIOs ------------- */
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writel(0x007FFFFF, S3C_GPACON);
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writel(0x00000000, S3C_GPCCON);
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writel(0x00000000, S3C_GPCUP);
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writel(0x00000000, S3C_GPDCON);
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writel(0x00000000, S3C_GPDUP);
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writel(0xAAAAAAAA, S3C_GPECON);
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writel(0x0000E03F, S3C_GPEUP);
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writel(0x00000000, S3C_GPBCON); /* all inputs */
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writel(0x00000007, S3C_GPBUP); /* pullup disabled for GPB0..3 */
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writel(0x00009000, S3C_GPFCON); /* GPF7 CLK_INT#, GPF6 Debug-LED */
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writel(0x000000FF, S3C_GPFUP);
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writel(readl(S3C_GPGDAT) | 0x0010, S3C_GPGDAT); /* switch off LCD backlight */
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writel(0xFF00A938, S3C_GPGCON); /* switch off USB device */
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writel(0x0000F000, S3C_GPGUP);
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writel(readl(S3C_GPHDAT) | 0x100, S3C_GPHDAT); /* switch BOOTINT/GPIO_ON# to high */
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writel(0x000007FF, S3C_GPHUP);
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writel(0x0029FAAA, S3C_GPHCON);
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/*
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* USB port1 normal, USB port0 normal, USB1 pads for device
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* PCLK output on CLKOUT0, UPLL CLK output on CLKOUT1,
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* 2nd SDRAM bank off (only bank 1 is used)
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*/
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writel(0x40140, S3C_MISCCR);
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arm_add_mem_device("ram0", S3C_SDRAM_BASE, size);
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return 0;
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}
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mem_initcall(a9m2410_mem_init);
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static int a9m2410_devices_init(void)
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{
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uint32_t reg;
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/* ----------- configure the access to the outer space ---------- */
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reg = readl(S3C_BWSCON);
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/* CS#1 to access the network controller */
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reg &= ~0xf0;
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reg |= 0xe0;
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writel(0x1350, S3C_BANKCON1);
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/* CS#2 to the dual 16550 UART */
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reg &= ~0xf00;
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reg |= 0x400;
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writel(0x0d50, S3C_BANKCON2);
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writel(reg, S3C_BWSCON);
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/* release the reset signal to the network and UART device */
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reg = readl(S3C_MISCCR);
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reg |= 0x10000;
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writel(reg, S3C_MISCCR);
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/* ----------- the devices the boot loader should work with -------- */
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s3c24xx_add_nand(&nand_info);
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/*
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* SMSC 91C111 network controller on the baseboard
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* connected to CS line 1 and interrupt line
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* GPIO3, data width is 32 bit
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*/
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add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL, S3C_CS1_BASE + 0x300,
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16, IORESOURCE_MEM, NULL);
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#ifdef CONFIG_NAND
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/* ----------- add some vital partitions -------- */
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devfs_add_partition("nand0", 0x00000, 0x40000, DEVFS_PARTITION_FIXED, "self_raw");
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dev_add_bb_dev("self_raw", "self0");
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devfs_add_partition("nand0", 0x40000, 0x20000, DEVFS_PARTITION_FIXED, "env_raw");
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dev_add_bb_dev("env_raw", "env0");
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#endif
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armlinux_set_bootparams((void*)S3C_SDRAM_BASE + 0x100);
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armlinux_set_architecture(MACH_TYPE_A9M2410);
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return 0;
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}
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device_initcall(a9m2410_devices_init);
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static int a9m2410_console_init(void)
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{
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s3c24xx_add_uart1();
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return 0;
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}
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console_initcall(a9m2410_console_init);
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/** @page a9m2410 DIGI's a9m2410
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This CPU card is based on a Samsung S3C2410 CPU. The card is shipped with:
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- S3C2410\@200 MHz (ARM920T/ARMv4T)
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- 12MHz crystal reference
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- SDRAM 32 MiB
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- Samsung K4M563233E-EE1H
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- 2M x 32Bit x 4 Banks Mobile SDRAM
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- 90 pin FBGA
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- CL3\@133MHz, CL2\@100MHz (CAS/RAS delay 19ns)
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- four banks
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- 32 bit data bits
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- row address size is 11
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- Row cycle time: 69ns
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- collumn address size is 9 bits
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- Extended temperature range (-25<32>C...85<EFBFBD>C)
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- 64ms refresh period (4k)
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- NAND Flash 32 MiB
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- Samsung KM29U256T
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- 32MiB 3,3V 8-bit
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- ID: 0xEC, 0x75, 0x??, 0xBD
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- 30ns/40ns/20ns
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- I2C interface, 100KHz and 400KHz
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- Real Time Clock
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- Dallas DS1337
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- address 0x68
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- EEPROM
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- ST M24LC64
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- address 0x50
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- 16bit addressing
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- LCD interface
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- Touch Screen interface
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- Camera interface
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- I2S interface
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- AC97 Audio-CODEC interface
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- SD card interface
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- 3 serial RS232 interfaces
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- Host and device USB interface, USB1.1 compliant
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- Ethernet interface
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- 10Mbps, Cirrus Logic, CS8900A (on the CPU card) or
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- 10/100Mbps, SMSC 91C111 (on the baseboard)
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- SPI interface
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- JTAG interface
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How to get the binary image:
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Using the default configuration:
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@code
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make ARCH=arm a9m2410_defconfig
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@endcode
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Build the binary image:
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@code
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make ARCH=arm CROSS_COMPILE=armv4compiler
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@endcode
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@note replace the armv4compiler with your ARM v4 cross compiler.
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*/
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