169 lines
4.2 KiB
C
169 lines
4.2 KiB
C
/*
|
|
* Copyright (C) 2012 Sascha Hauer, Pengutronix
|
|
*
|
|
* This program is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU General Public License as
|
|
* published by the Free Software Foundation; either version 2 of
|
|
* the License, or (at your option) any later version.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#include <common.h>
|
|
#include <init.h>
|
|
#include <environment.h>
|
|
#include <mach/imx-regs.h>
|
|
#include <fec.h>
|
|
#include <mach/gpio.h>
|
|
#include <asm/armlinux.h>
|
|
#include <generated/mach-types.h>
|
|
#include <partition.h>
|
|
#include <miidev.h>
|
|
#include <asm/io.h>
|
|
#include <asm/mmu.h>
|
|
#include <mach/generic.h>
|
|
#include <sizes.h>
|
|
#include <mach/imx6.h>
|
|
#include <mach/devices-imx6.h>
|
|
#include <mach/iomux-mx6.h>
|
|
|
|
static iomux_v3_cfg_t arm2_pads[] = {
|
|
/* UART1 */
|
|
MX6Q_PAD_KEY_COL0__UART4_TXD,
|
|
MX6Q_PAD_KEY_ROW0__UART4_RXD,
|
|
|
|
MX6Q_PAD_SD1_CLK__USDHC1_CLK,
|
|
MX6Q_PAD_SD1_CMD__USDHC1_CMD,
|
|
MX6Q_PAD_SD1_DAT0__USDHC1_DAT0,
|
|
MX6Q_PAD_SD1_DAT1__USDHC1_DAT1,
|
|
MX6Q_PAD_SD1_DAT2__USDHC1_DAT2,
|
|
MX6Q_PAD_SD1_DAT3__USDHC1_DAT3,
|
|
|
|
MX6Q_PAD_SD2_CLK__USDHC2_CLK,
|
|
MX6Q_PAD_SD2_CMD__USDHC2_CMD,
|
|
MX6Q_PAD_SD2_DAT0__USDHC2_DAT0,
|
|
MX6Q_PAD_SD2_DAT1__USDHC2_DAT1,
|
|
MX6Q_PAD_SD2_DAT2__USDHC2_DAT2,
|
|
MX6Q_PAD_SD2_DAT3__USDHC2_DAT3,
|
|
|
|
MX6Q_PAD_SD3_CLK__USDHC3_CLK,
|
|
MX6Q_PAD_SD3_CMD__USDHC3_CMD,
|
|
MX6Q_PAD_SD3_DAT0__USDHC3_DAT0,
|
|
MX6Q_PAD_SD3_DAT1__USDHC3_DAT1,
|
|
MX6Q_PAD_SD3_DAT2__USDHC3_DAT2,
|
|
MX6Q_PAD_SD3_DAT3__USDHC3_DAT3,
|
|
MX6Q_PAD_SD3_DAT4__USDHC3_DAT4,
|
|
MX6Q_PAD_SD3_DAT5__USDHC3_DAT5,
|
|
MX6Q_PAD_SD3_DAT6__USDHC3_DAT6,
|
|
MX6Q_PAD_SD3_DAT7__USDHC3_DAT7,
|
|
MX6Q_PAD_GPIO_18__USDHC3_VSELECT,
|
|
|
|
MX6Q_PAD_SD4_CLK__USDHC4_CLK,
|
|
MX6Q_PAD_SD4_CMD__USDHC4_CMD,
|
|
MX6Q_PAD_SD4_DAT0__USDHC4_DAT0,
|
|
MX6Q_PAD_SD4_DAT1__USDHC4_DAT1,
|
|
MX6Q_PAD_SD4_DAT2__USDHC4_DAT2,
|
|
MX6Q_PAD_SD4_DAT3__USDHC4_DAT3,
|
|
MX6Q_PAD_SD4_DAT4__USDHC4_DAT4,
|
|
MX6Q_PAD_SD4_DAT5__USDHC4_DAT5,
|
|
MX6Q_PAD_SD4_DAT6__USDHC4_DAT6,
|
|
MX6Q_PAD_SD4_DAT7__USDHC4_DAT7,
|
|
|
|
MX6Q_PAD_KEY_COL1__ENET_MDIO,
|
|
MX6Q_PAD_KEY_COL2__ENET_MDC,
|
|
MX6Q_PAD_RGMII_TXC__ENET_RGMII_TXC,
|
|
MX6Q_PAD_RGMII_TD0__ENET_RGMII_TD0,
|
|
MX6Q_PAD_RGMII_TD1__ENET_RGMII_TD1,
|
|
MX6Q_PAD_RGMII_TD2__ENET_RGMII_TD2,
|
|
MX6Q_PAD_RGMII_TD3__ENET_RGMII_TD3,
|
|
MX6Q_PAD_RGMII_TX_CTL__ENET_RGMII_TX_CTL,
|
|
MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK,
|
|
MX6Q_PAD_RGMII_RXC__ENET_RGMII_RXC,
|
|
MX6Q_PAD_RGMII_RD0__ENET_RGMII_RD0,
|
|
MX6Q_PAD_RGMII_RD1__ENET_RGMII_RD1,
|
|
MX6Q_PAD_RGMII_RD2__ENET_RGMII_RD2,
|
|
MX6Q_PAD_RGMII_RD3__ENET_RGMII_RD3,
|
|
MX6Q_PAD_RGMII_RX_CTL__ENET_RGMII_RX_CTL,
|
|
MX6Q_PAD_GPIO_0__CCM_CLKO,
|
|
MX6Q_PAD_GPIO_3__CCM_CLKO2,
|
|
};
|
|
|
|
static int arm2_mem_init(void)
|
|
{
|
|
arm_add_mem_device("ram0", 0x10000000, SZ_2G);
|
|
|
|
return 0;
|
|
}
|
|
mem_initcall(arm2_mem_init);
|
|
|
|
static struct fec_platform_data fec_info = {
|
|
.xcv_type = RGMII,
|
|
.phy_addr = 0,
|
|
};
|
|
|
|
static int mx6_rgmii_rework(void)
|
|
{
|
|
struct mii_device *mdev;
|
|
u16 val;
|
|
|
|
mdev = mii_open("phy0");
|
|
if (!mdev) {
|
|
printf("unable to open phy0\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
|
|
mii_write(mdev, mdev->address, 0xd, 0x7);
|
|
mii_write(mdev, mdev->address, 0xe, 0x8016);
|
|
mii_write(mdev, mdev->address, 0xd, 0x4007);
|
|
|
|
val = mii_read(mdev, mdev->address, 0xe);
|
|
val &= 0xffe3;
|
|
val |= 0x18;
|
|
mii_write(mdev, mdev->address, 0xe, val);
|
|
|
|
/* introduce tx clock delay */
|
|
mii_write(mdev, mdev->address, 0x1d, 0x5);
|
|
|
|
val = mii_read(mdev, mdev->address, 0x1e);
|
|
val |= 0x0100;
|
|
mii_write(mdev, mdev->address, 0x1e, val);
|
|
|
|
mii_close(mdev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int arm2_devices_init(void)
|
|
{
|
|
imx6_add_mmc3(NULL);
|
|
|
|
imx6_add_fec(&fec_info);
|
|
mx6_rgmii_rework();
|
|
|
|
armlinux_set_bootparams((void *)0x10000100);
|
|
armlinux_set_architecture(3837);
|
|
|
|
devfs_add_partition("disk0", 0, SZ_1M, DEVFS_PARTITION_FIXED, "self0");
|
|
devfs_add_partition("disk0", SZ_1M + SZ_1M, SZ_512K, DEVFS_PARTITION_FIXED, "env0");
|
|
|
|
return 0;
|
|
}
|
|
|
|
device_initcall(arm2_devices_init);
|
|
|
|
static int arm2_console_init(void)
|
|
{
|
|
mxc_iomux_v3_setup_multiple_pads(arm2_pads, ARRAY_SIZE(arm2_pads));
|
|
|
|
imx6_init_lowlevel();
|
|
|
|
imx6_add_uart3();
|
|
|
|
return 0;
|
|
}
|
|
console_initcall(arm2_console_init);
|