135 lines
3.1 KiB
C
135 lines
3.1 KiB
C
/*
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* (C) 2015 Robert Jarzmik <robert.jarzmik@free.fr>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <driver.h>
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#include <environment.h>
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#include <fs.h>
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#include <init.h>
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#include <partition.h>
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#include <led.h>
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#include <gpio.h>
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#include <pwm.h>
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#include <linux/sizes.h>
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#include <mach/devices.h>
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#include <mach/mfp-pxa27x.h>
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#include <mach/pxa-regs.h>
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#include <mach/udc_pxa2xx.h>
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#include <mach/mci_pxa2xx.h>
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#include <platform_data/eth-smc91111.h>
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#include <asm/armlinux.h>
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#include <asm/io.h>
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#include <asm/mmu.h>
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#include <generated/mach-types.h>
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static struct smc91c111_pdata smsc91x_pdata = {
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.word_aligned_short_writes = true,
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};
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static unsigned long mainstone_pin_config[] = {
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GPIO15_nCS_1, /* CS1 - Flash */
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GPIO78_nCS_2, /* CS2 - Baseboard FGPA + SRAM */
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GPIO80_nCS_4, /* CS4 - SMC ethernet */
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/* Ethernet: static memory VLIO */
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GPIO18_RDY,
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/* PC Card */
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GPIO48_nPOE,
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GPIO49_nPWE,
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GPIO50_nPIOR,
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GPIO51_nPIOW,
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GPIO85_nPCE_1,
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GPIO54_nPCE_2,
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GPIO79_PSKTSEL,
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GPIO55_nPREG,
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GPIO56_nPWAIT,
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GPIO57_nIOIS16,
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/* MMC */
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GPIO32_MMC_CLK,
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GPIO112_MMC_CMD,
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GPIO92_MMC_DAT_0,
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GPIO109_MMC_DAT_1,
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GPIO110_MMC_DAT_2,
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GPIO111_MMC_DAT_3,
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/* LCD - 16bpp DSTN */
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GPIOxx_LCD_TFT_16BPP,
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/* Backlight */
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GPIO16_PWM0_OUT,
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/* FFUART */
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GPIO34_FFUART_RXD,
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GPIO35_FFUART_CTS,
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GPIO36_FFUART_DCD,
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GPIO37_FFUART_DSR,
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GPIO38_FFUART_RI,
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GPIO39_FFUART_TXD,
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GPIO40_FFUART_DTR,
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GPIO41_FFUART_RTS,
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};
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static int mainstone_devices_init(void)
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{
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void *nor0_iospace;
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armlinux_set_architecture(MACH_TYPE_MAINSTONE);
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pxa_add_uart((void *)0x40100000, 0);
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pxa_add_pwm((void *)0x40b00000, 0);
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nor0_iospace = map_io_sections(0x0, (void *)0xe0000000, SZ_64M);
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add_cfi_flash_device(0, (ulong)nor0_iospace, SZ_64M, 0);
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add_cfi_flash_device(1, 0x04000000, SZ_64M, 0);
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devfs_add_partition("nor0", SZ_2M, SZ_256K, DEVFS_PARTITION_FIXED,
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"env0");
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add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL,
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0x10000300, 0xff4000, IORESOURCE_MEM,
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&smsc91x_pdata);
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return 0;
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}
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device_initcall(mainstone_devices_init);
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static int mainstone_coredevice_init(void)
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{
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/*
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* Put the board in superspeed (520 MHz) to speed-up logo/OS loading.
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*/
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CCCR = CCCR_A | 0x20290;
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barebox_set_model("Mainstone PXA27x");
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barebox_set_hostname("mainstone");
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pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
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return 0;
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}
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coredevice_initcall(mainstone_coredevice_init);
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static int mainstone_mem_init(void)
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{
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arm_add_mem_device("ram0", 0xa0000000, SZ_64M);
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add_mem_device("sram0", 0x0a000000, SZ_1M, IORESOURCE_MEM_WRITEABLE);
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return 0;
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}
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mem_initcall(mainstone_mem_init);
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