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barebox/arch/openrisc
Franck Jullien 7911f5efdd openrisc: fix relocation code
The relocation code can now relocate from anywhere to
the RAM.

The old code assumed that the binary was copied to the RAM
by some PBL and then it just relocated the .text section
from the loaded address to the linked address.

Now, it first checks if vectors are somewhere else than the
linked address. If yes, there are copied to address 0 (or
to the exception vector base address if register EVBAR is
present).

Then, the .text section is relocated from its current location
to the RAM.

Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-05-22 08:07:21 +02:00
..
boards/generic x86: ns16550: Rework driver to allow for x86 I/O space 2014-04-09 19:31:42 +02:00
configs openrisc: enable OpenCores ethernet driver 2013-12-17 08:20:48 +01:00
cpu openrisc: fix relocation code 2014-05-22 08:07:21 +02:00
include/asm openrisc: update SPR registers definition 2014-05-22 08:07:21 +02:00
lib openrisc: initialize malloc pool before start_barebox() 2013-03-14 08:41:23 +01:00
Kconfig Set model and hostname at boardlevel 2013-08-16 08:40:55 +02:00
Makefile Add __ashrdi3 and remove link to libgcc 2012-09-14 08:39:33 +02:00