43 lines
1.2 KiB
C
43 lines
1.2 KiB
C
/*
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* (C) Copyright 2004
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* Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
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*
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* Eric Schumann, Phytec Messtechnik
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* adapted for mt46v32m16-75 DDR-RAM
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#define SDRAM_DDR 1 /* is DDR */
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/* Settings for XLB = 132 MHz */
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#define SDRAM_MODE 0x018D0000
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#define SDRAM_EMODE 0x40090000
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#define SDRAM_CONTROL 0x715f0f00
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#define SDRAM_CONFIG1 0x73722930
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#define SDRAM_CONFIG2 0x47770000
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/* Settings for XLB = 99 MHz */
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/*
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#define SDRAM_MODE 0x008D0000
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#define SDRAM_EMODE 0x40090000
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#define SDRAM_CONTROL 0x714b0f00
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#define SDRAM_CONFIG1 0x63611730
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#define SDRAM_CONFIG2 0x47670000
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*/
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#define SDRAM_TAPDELAY 0x10000000 /* reserved Bit in MPC5200 B3-Step */
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