85 lines
2.9 KiB
C
85 lines
2.9 KiB
C
/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mach/imx-regs.h>
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#include <sizes.h>
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#include <init.h>
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#include <io.h>
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int imx_silicon_revision(void)
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{
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return CID >> 28;
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}
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/*
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* Initialize MAX on i.MX27. necessary to give the DMA engine
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* higher priority to the memory than the CPU. Needed for proper
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* audio support
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*/
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#define MAX_SLAVE_MPR_OFFSET 0x0 /* Master Priority register */
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#define MAX_SLAVE_AMPR_OFFSET 0x4 /* Alternate Master Priority register */
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#define MAX_SLAVE_PORT0_OFFSET 0x0
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#define MAX_SLAVE_PORT1_OFFSET 0x100
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#define MAX_SLAVE_PORT2_OFFSET 0x200
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#define MAX_MASTER_PRIO(master, prio) (((prio) << (master) * 4))
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#define MASTER_IAHB 0
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#define MASTER_DAHB 1
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#define MASTER_EMMA 2
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#define MASTER_DMA 3
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#define MASTER_SLDC 4
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#define MASTER_CODEC 5
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static void imx27_init_max(void)
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{
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void __iomem *max_base = (void *)IMX_MAX_BASE;
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u32 val;
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/* 0 is the highest priority */
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val = MAX_MASTER_PRIO(MASTER_IAHB, 5) |
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MAX_MASTER_PRIO(MASTER_DAHB, 4) |
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MAX_MASTER_PRIO(MASTER_EMMA, 1) |
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MAX_MASTER_PRIO(MASTER_DMA, 2) |
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MAX_MASTER_PRIO(MASTER_SLDC, 0) |
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MAX_MASTER_PRIO(MASTER_CODEC, 3);
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writel(val, max_base + MAX_SLAVE_PORT0_OFFSET + MAX_SLAVE_MPR_OFFSET);
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writel(val, max_base + MAX_SLAVE_PORT1_OFFSET + MAX_SLAVE_MPR_OFFSET);
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writel(val, max_base + MAX_SLAVE_PORT2_OFFSET + MAX_SLAVE_MPR_OFFSET);
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writel(val, max_base + MAX_SLAVE_PORT0_OFFSET + MAX_SLAVE_AMPR_OFFSET);
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writel(val, max_base + MAX_SLAVE_PORT1_OFFSET + MAX_SLAVE_AMPR_OFFSET);
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writel(val, max_base + MAX_SLAVE_PORT2_OFFSET + MAX_SLAVE_AMPR_OFFSET);
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}
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static int imx27_init(void)
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{
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add_generic_device("imx_iim", 0, NULL, IMX_IIM_BASE, SZ_4K,
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IORESOURCE_MEM, NULL);
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imx27_init_max();
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add_generic_device("imx-gpio", 0, NULL, 0x10015000, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx-gpio", 1, NULL, 0x10015100, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx-gpio", 2, NULL, 0x10015200, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx-gpio", 3, NULL, 0x10015300, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx-gpio", 4, NULL, 0x10015400, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx-gpio", 5, NULL, 0x10015500, 0x100, IORESOURCE_MEM, NULL);
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return 0;
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}
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coredevice_initcall(imx27_init);
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