232 lines
4.2 KiB
C
232 lines
4.2 KiB
C
/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm-generic/errno.h>
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#include <mach/imx-regs.h>
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#include <mach/generic.h>
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#include <mach/clock.h>
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#include <init.h>
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#ifndef CLK32
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#define CLK32 32000
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#endif
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static ulong clk_in_32k(void)
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{
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return 1024 * CLK32;
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}
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static ulong clk_in_26m(void)
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{
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if (CSCR & CSCR_OSC26M_DIV1P5) {
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/* divide by 1.5 */
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return 173333333;
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} else {
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/* divide by 1 */
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return 26000000;
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}
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}
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ulong imx_get_mpllclk(void)
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{
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ulong cscr = CSCR;
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ulong fref;
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if (cscr & CSCR_MCU_SEL)
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fref = clk_in_26m();
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else
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fref = clk_in_32k();
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return imx_decode_pll(MPCTL0, fref);
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}
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ulong imx_get_armclk(void)
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{
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ulong cscr = CSCR;
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ulong fref = imx_get_mpllclk();
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ulong div;
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if (!(cscr & CSCR_ARM_SRC_MPLL) &&
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(imx_silicon_revision() != IMX27_CHIP_REVISION_1_0))
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fref = (fref * 2) / 3;
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div = ((cscr >> 12) & 0x3) + 1;
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return fref / div;
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}
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ulong imx_get_ahbclk(void)
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{
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ulong cscr = CSCR;
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ulong fref = imx_get_mpllclk();
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ulong div;
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if (imx_silicon_revision() == IMX27_CHIP_REVISION_1_0)
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div = ((cscr >> 9) & 0xf) + 1;
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else
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div = ((cscr >> 8) & 0x3) + 1;
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return ((fref * 2) / 3) / div;
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}
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ulong imx_get_ipgclk(void)
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{
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ulong clk = imx_get_ahbclk();
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return clk >> 1;
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}
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ulong imx_get_fecclk(void)
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{
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return imx_get_ipgclk();
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}
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ulong imx_get_spllclk(void)
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{
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ulong cscr = CSCR;
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ulong spctl0;
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ulong fref;
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if (cscr & CSCR_SP_SEL)
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fref = clk_in_26m();
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else
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fref = clk_in_32k();
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spctl0 = SPCTL0;
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SPCTL0 = spctl0;
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return imx_decode_pll(spctl0, fref);
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}
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static ulong imx_decode_perclk(ulong div)
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{
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if (imx_silicon_revision() == IMX27_CHIP_REVISION_1_0)
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return imx_get_mpllclk() / div;
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else
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return (imx_get_mpllclk() * 2) / (div * 3);
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}
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ulong imx_get_perclk1(void)
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{
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return imx_decode_perclk((PCDR1 & 0x3f) + 1);
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}
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ulong imx_get_perclk2(void)
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{
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return imx_decode_perclk(((PCDR1 >> 8) & 0x3f) + 1);
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}
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ulong imx_get_perclk3(void)
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{
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return imx_decode_perclk(((PCDR1 >> 16) & 0x3f) + 1);
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}
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ulong imx_get_perclk4(void)
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{
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return imx_decode_perclk(((PCDR1 >> 24) & 0x3f) + 1);
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}
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ulong imx_get_uartclk(void)
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{
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return imx_get_perclk1();
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}
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ulong imx_get_gptclk(void)
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{
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return imx_decode_perclk((PCDR1 & 0x3f) + 1);
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}
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ulong imx_get_lcdclk(void)
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{
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return imx_get_perclk3();
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}
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ulong fsl_get_i2cclk(void)
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{
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return imx_get_ipgclk();
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}
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ulong imx_get_mmcclk(void)
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{
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return imx_get_perclk2();
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}
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void imx_dump_clocks(void)
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{
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uint32_t cid = CID;
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printf("chip id: [%d,%03x,%d,%03x]\n",
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(cid >> 28) & 0xf, (cid >> 16) & 0xfff,
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(cid >> 12) & 0xf, (cid >> 0) & 0xfff);
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printf("mpll: %10ld Hz\n", imx_get_mpllclk());
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printf("spll: %10ld Hz\n", imx_get_spllclk());
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printf("arm: %10ld Hz\n", imx_get_armclk());
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printf("perclk1: %10ld Hz\n", imx_get_perclk1());
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printf("perclk2: %10ld Hz\n", imx_get_perclk2());
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printf("perclk3: %10ld Hz\n", imx_get_perclk3());
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printf("perclk4: %10ld Hz\n", imx_get_perclk4());
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printf("clkin26: %10ld Hz\n", clk_in_26m());
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printf("ahb: %10ld Hz\n", imx_get_ahbclk());
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printf("ipg: %10ld Hz\n", imx_get_ipgclk());
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}
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/*
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* Set the divider of the CLKO pin. Returns
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* the new divider (which may be smaller
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* than the desired one)
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*/
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int imx_clko_set_div(int num, int div)
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{
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ulong pcdr;
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if (num != 1)
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return -ENODEV;
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div--;
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div &= 0x7;
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pcdr = PCDR0 & ~(7 << 22);
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pcdr |= div << 22;
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PCDR0 = pcdr;
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return div + 1;
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}
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/*
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* Set the clock source for the CLKO pin
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*/
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void imx_clko_set_src(int num, int src)
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{
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unsigned long ccsr;
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if (num != 1)
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return;
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if (src < 0) {
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PCDR0 &= ~(1 << 25);
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return;
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}
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ccsr = CCSR & ~0x1f;
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ccsr |= src & 0x1f;
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CCSR = ccsr;
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PCDR0 |= (1 << 25);
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}
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