91 lines
3.0 KiB
C
91 lines
3.0 KiB
C
/**
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* @file
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* @brief This file contains the Control register defines
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*
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* Originally from Linux kernel:
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* http://linux.omap.com/pub/kernel/3430zoom/linux-ldp-v1.0b.tar.gz
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* include/asm-arm/arch-omap/omap34xx.h
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*
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* (C) Copyright 2008
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* Texas Instruments, <www.ti.com>
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* Nishanth Menon <x0nishan@ti.com>
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*
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* Copyright (C) 2007 Texas Instruments, <www.ti.com>
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* Copyright (C) 2007 Nokia Corporation.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ASM_ARCH_OMAP_CONTROL_H
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#define __ASM_ARCH_OMAP_CONTROL_H
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/**
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* Control register defintion which unwraps to the real register
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* offset + base address
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*/
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#define CONTROL_REG(REGNAME) (OMAP_CTRL_BASE + CONTROL_##REGNAME)
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#define CONTROL_SCALABLE_OMAP_STATUS (0x44C)
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#define CONTROL_SCALABLE_OMAP_OCP (0x534)
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#define CONTROL_SCRATCHPAD_BASE (0x910)
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#define CONTROL_SCRATCHPAD_ROM_BASE (0x860)
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#define CONTROL_STATUS (0x2f0)
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#define CONTROL_SYSCONFIG (0x010)
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#define CONTROL_DEVCONF0 (0x274)
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#define CONTROL_DEVCONF1 (0x2D8)
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#define CONTROL_IVA2_BOOTMOD (0x404)
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#define CONTROL_IVA2_BOOTADDR (0x400)
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#define CONTROL_PBIAS_1 (0x520)
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#define CONTROL_GENERAL_PURPOSE_STATUS (0x2F4)
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#define CONTROL_MEM_DFTRW0 (0x278)
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#define CONTROL_MEM_DFTRW1 (0x27C)
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#define CONTROL_MSUSPENDMUX_0 (0x290)
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#define CONTROL_MSUSPENDMUX_1 (0x294)
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#define CONTROL_MSUSPENDMUX_2 (0x298)
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#define CONTROL_MSUSPENDMUX_3 (0x29C)
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#define CONTROL_MSUSPENDMUX_4 (0x2A0)
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#define CONTROL_MSUSPENDMUX_5 (0x2A4)
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#define CONTROL_SEC_CTRL (0x2B0)
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#define CONTROL_CSIRXFE (0x2DC)
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#define CONTROL_DEBOBS_0 (0x420)
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#define CONTROL_DEBOBS_1 (0x424)
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#define CONTROL_DEBOBS_2 (0x428)
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#define CONTROL_DEBOBS_3 (0x42C)
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#define CONTROL_DEBOBS_4 (0x430)
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#define CONTROL_DEBOBS_5 (0x434)
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#define CONTROL_DEBOBS_6 (0x438)
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#define CONTROL_DEBOBS_7 (0x43C)
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#define CONTROL_DEBOBS_8 (0x440)
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#define CONTROL_PROG_IO0 (0x444)
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#define CONTROL_PROG_IO1 (0x448)
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#define CONTROL_DSS_DPLL_SPREADING (0x450)
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#define CONTROL_CORE_DPLL_SPREADING (0x454)
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#define CONTROL_PER_DPLL_SPREADING (0x458)
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#define CONTROL_USBHOST_DPLL_SPREADING (0x45C)
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#define CONTROL_TEMP_SENSOR (0x524)
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#define CONTROL_SRAMLDO4 (0x528)
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#define CONTROL_SRAMLDO5 (0x52C)
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#define CONTROL_CSI (0x530)
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#define CONTROL_SCALABLE_OMAP_OCP (0x534)
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#define CONTROL_SCALABLE_OMAP_STATUS (0x44C)
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/** Provide the Regoffset, Value */
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#define MUX_VAL(OFFSET,VALUE)\
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writew((VALUE), OMAP_CTRL_BASE + (OFFSET))
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/**
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* macro for Padconfig Registers @see
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* include/mach-arm/arch-omap/omap3-mux.h
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*/
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#define CP(X) (CONTROL_PADCONF_##X)
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#endif /* __ASM_ARCH_OMAP_CONTROL_H */
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