48 lines
1.7 KiB
C
48 lines
1.7 KiB
C
/*
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* Copyright
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* (C) 2013 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __MACH_MVEBU_ARMADA_370_XP_REGS_H
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#define __MACH_MVEBU_ARMADA_370_XP_REGS_H
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#include <mach/common.h>
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#define ARMADA_370_XP_INT_REGS_BASE IOMEM(MVEBU_REMAP_INT_REG_BASE)
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#define ARMADA_370_XP_UART_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x12000)
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#define ARMADA_370_XP_UARTn_BASE(n) \
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(ARMADA_370_XP_UART_BASE + ((n) * 0x100))
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#define ARMADA_370_XP_SYSCTL_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x18200)
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#define ARMADA_370_XP_SAR_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x18230)
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#define SAR_LOW 0x00
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#define SAR_TCLK_FREQ BIT(20)
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#define SAR_HIGH 0x04
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#define ARMADA_370_XP_SDRAM_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x20000)
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#define DDR_BASE_CS 0x180
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#define DDR_BASE_CSn(n) (DDR_BASE_CS + ((n) * 0x8))
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#define DDR_BASE_CS_HIGH_MASK 0x0000000f
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#define DDR_BASE_CS_LOW_MASK 0xff000000
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#define DDR_SIZE_CS 0x184
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#define DDR_SIZE_CSn(n) (DDR_SIZE_CS + ((n) * 0x8))
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#define DDR_SIZE_ENABLED BIT(0)
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#define DDR_SIZE_CS_MASK 0x0000001c
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#define DDR_SIZE_CS_SHIFT 2
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#define DDR_SIZE_MASK 0xff000000
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#define ARMADA_370_XP_TIMER_BASE (ARMADA_370_XP_INT_REGS_BASE + 0x20300)
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#endif /* __MACH_MVEBU_DOVE_REGS_H */
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