354 lines
10 KiB
C
354 lines
10 KiB
C
/*
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* arch/arm/mach-at91/at91sam9261_devices.c
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*
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* Copyright (C) 2006 Atmel
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <common.h>
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#include <sizes.h>
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#include <gpio.h>
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#include <asm/armlinux.h>
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#include <asm/hardware.h>
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#include <mach/at91_pmc.h>
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#include <mach/at91sam9261_matrix.h>
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#include <mach/at91sam9_sdramc.h>
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#include <mach/board.h>
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#include <mach/iomux.h>
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#include <mach/io.h>
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#include <mach/cpu.h>
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#include <i2c/i2c-gpio.h>
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#include "generic.h"
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void at91_add_device_sdram(u32 size)
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{
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if (!size)
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size = at91sam9261_get_sdram_size();
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arm_add_mem_device("ram0", AT91_CHIPSELECT_1, size);
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if (cpu_is_at91sam9g10())
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add_mem_device("sram0", AT91SAM9G10_SRAM_BASE,
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AT91SAM9G10_SRAM_SIZE, IORESOURCE_MEM_WRITEABLE);
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else
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add_mem_device("sram0", AT91SAM9261_SRAM_BASE,
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AT91SAM9261_SRAM_SIZE, IORESOURCE_MEM_WRITEABLE);
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}
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/* --------------------------------------------------------------------
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* USB Host
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_USB_OHCI)
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void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data)
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{
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int i;
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if (!data)
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return;
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/* Enable VBus control for UHP ports */
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for (i = 0; i < data->ports; i++) {
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if (gpio_is_valid(data->vbus_pin[i]))
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at91_set_gpio_output(data->vbus_pin[i],
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data->vbus_pin_active_low[i]);
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}
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add_generic_device("at91_ohci", DEVICE_ID_DYNAMIC, NULL, AT91SAM9261_UHP_BASE,
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1024 * 1024, IORESOURCE_MEM, data);
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}
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#else
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void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) {}
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#endif
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/* --------------------------------------------------------------------
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* USB Device (Gadget)
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* -------------------------------------------------------------------- */
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#ifdef CONFIG_USB_GADGET_DRIVER_AT91
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void __init at91_add_device_udc(struct at91_udc_data *data)
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{
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if (gpio_is_valid(data->vbus_pin)) {
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at91_set_gpio_input(data->vbus_pin, 0);
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at91_set_deglitch(data->vbus_pin, 1);
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}
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add_generic_device("at91_udc", DEVICE_ID_DYNAMIC, NULL, AT91SAM9261_BASE_UDP,
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SZ_16K, IORESOURCE_MEM, data);
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}
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#else
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void __init at91_add_device_udc(struct at91_udc_data *data) {}
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#endif
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#if defined(CONFIG_NAND_ATMEL)
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void at91_add_device_nand(struct atmel_nand_data *data)
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{
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unsigned long csa;
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if (!data)
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return;
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csa = at91_sys_read(AT91_MATRIX_EBICSA);
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at91_sys_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
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/* enable pin */
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if (gpio_is_valid(data->enable_pin))
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at91_set_gpio_output(data->enable_pin, 1);
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/* ready/busy pin */
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if (gpio_is_valid(data->rdy_pin))
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at91_set_gpio_input(data->rdy_pin, 1);
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/* card detect pin */
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if (gpio_is_valid(data->det_pin))
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at91_set_gpio_input(data->det_pin, 1);
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at91_set_A_periph(AT91_PIN_PC0, 0); /* NANDOE */
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at91_set_A_periph(AT91_PIN_PC1, 0); /* NANDWE */
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add_generic_device("atmel_nand", 0, NULL, AT91_CHIPSELECT_3, 0x10,
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IORESOURCE_MEM, data);
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}
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#else
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void at91_add_device_nand(struct atmel_nand_data *data) {}
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#endif
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/* --------------------------------------------------------------------
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* TWI (i2c)
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_I2C_GPIO)
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static struct i2c_gpio_platform_data pdata_i2c = {
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.sda_pin = AT91_PIN_PA7,
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.sda_is_open_drain = 1,
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.scl_pin = AT91_PIN_PA8,
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.scl_is_open_drain = 1,
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.udelay = 5, /* ~100 kHz */
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};
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void at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, int nr_devices)
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{
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struct i2c_gpio_platform_data *pdata = &pdata_i2c;
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i2c_register_board_info(0, devices, nr_devices);
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at91_set_GPIO_periph(pdata->sda_pin, 1); /* TWD (SDA) */
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at91_set_multi_drive(pdata->sda_pin, 1);
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at91_set_GPIO_periph(pdata->scl_pin, 1); /* TWCK (SCL) */
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at91_set_multi_drive(pdata->scl_pin, 1);
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add_generic_device_res("i2c-gpio", 0, NULL, 0, pdata);
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}
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#else
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void at91_add_device_i2c(short i2c_id, struct i2c_board_info *devices, int nr_devices) {}
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#endif
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/* --------------------------------------------------------------------
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* SPI
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_DRIVER_SPI_ATMEL)
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static unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
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static unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
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static struct at91_spi_platform_data spi_pdata[] = {
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[0] = {
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.chipselect = spi0_standard_cs,
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.num_chipselect = ARRAY_SIZE(spi0_standard_cs),
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},
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[1] = {
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.chipselect = spi1_standard_cs,
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.num_chipselect = ARRAY_SIZE(spi1_standard_cs),
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},
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};
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void at91_add_device_spi(int spi_id, struct at91_spi_platform_data *pdata)
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{
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int i;
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int cs_pin;
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resource_size_t start = ~0;
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BUG_ON(spi_id > 1);
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if (!pdata)
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pdata = &spi_pdata[spi_id];
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for (i = 0; i < pdata->num_chipselect; i++) {
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cs_pin = pdata->chipselect[i];
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/* enable chip-select pin */
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if (gpio_is_valid(cs_pin))
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at91_set_gpio_output(cs_pin, 1);
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}
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/* Configure SPI bus(es) */
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switch (spi_id) {
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case 0:
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start = AT91SAM9261_BASE_SPI0;
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at91_set_A_periph(AT91_PIN_PA0, 0); /* SPI0_MISO */
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at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
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at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */
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break;
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case 1:
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start = AT91SAM9261_BASE_SPI1;
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at91_set_A_periph(AT91_PIN_PB30, 0); /* SPI1_MISO */
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at91_set_A_periph(AT91_PIN_PB31, 0); /* SPI1_MOSI */
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at91_set_A_periph(AT91_PIN_PB29, 0); /* SPI1_SPCK */
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break;
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}
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add_generic_device("atmel_spi", spi_id, NULL, start, SZ_16K,
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IORESOURCE_MEM, pdata);
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}
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#else
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void __init at91_add_device_spi(int spi_id, struct at91_spi_platform_data *pdata) {}
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#endif
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/* --------------------------------------------------------------------
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* LCD Controller
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* -------------------------------------------------------------------- */
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#if defined(CONFIG_DRIVER_VIDEO_ATMEL)
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void __init at91_add_device_lcdc(struct atmel_lcdfb_platform_data *data)
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{
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BUG_ON(!data);
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data->have_intensity_bit = true;
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#if defined(CONFIG_FB_ATMEL_STN)
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at91_set_A_periph(AT91_PIN_PB0, 0); /* LCDVSYNC */
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at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
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at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
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at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
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at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
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at91_set_A_periph(AT91_PIN_PB5, 0); /* LCDD0 */
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at91_set_A_periph(AT91_PIN_PB6, 0); /* LCDD1 */
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at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
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at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
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#else
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at91_set_A_periph(AT91_PIN_PB1, 0); /* LCDHSYNC */
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at91_set_A_periph(AT91_PIN_PB2, 0); /* LCDDOTCK */
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at91_set_A_periph(AT91_PIN_PB3, 0); /* LCDDEN */
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at91_set_A_periph(AT91_PIN_PB4, 0); /* LCDCC */
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at91_set_A_periph(AT91_PIN_PB7, 0); /* LCDD2 */
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at91_set_A_periph(AT91_PIN_PB8, 0); /* LCDD3 */
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at91_set_A_periph(AT91_PIN_PB9, 0); /* LCDD4 */
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at91_set_A_periph(AT91_PIN_PB10, 0); /* LCDD5 */
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at91_set_A_periph(AT91_PIN_PB11, 0); /* LCDD6 */
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at91_set_A_periph(AT91_PIN_PB12, 0); /* LCDD7 */
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at91_set_A_periph(AT91_PIN_PB15, 0); /* LCDD10 */
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at91_set_A_periph(AT91_PIN_PB16, 0); /* LCDD11 */
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at91_set_A_periph(AT91_PIN_PB17, 0); /* LCDD12 */
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at91_set_A_periph(AT91_PIN_PB18, 0); /* LCDD13 */
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at91_set_A_periph(AT91_PIN_PB19, 0); /* LCDD14 */
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at91_set_A_periph(AT91_PIN_PB20, 0); /* LCDD15 */
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at91_set_B_periph(AT91_PIN_PB23, 0); /* LCDD18 */
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at91_set_B_periph(AT91_PIN_PB24, 0); /* LCDD19 */
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at91_set_B_periph(AT91_PIN_PB25, 0); /* LCDD20 */
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at91_set_B_periph(AT91_PIN_PB26, 0); /* LCDD21 */
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at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */
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at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */
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#endif
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add_generic_device("atmel_lcdfb", DEVICE_ID_SINGLE, NULL, AT91SAM9261_LCDC_BASE, SZ_4K,
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IORESOURCE_MEM, data);
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}
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#else
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void __init at91_add_device_lcdc(struct atmel_lcdfb_platform_data *data) {}
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#endif
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resource_size_t __init at91_configure_dbgu(void)
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{
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at91_set_A_periph(AT91_PIN_PA9, 0); /* DRXD */
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at91_set_A_periph(AT91_PIN_PA10, 1); /* DTXD */
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return AT91_BASE_SYS + AT91_DBGU;
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}
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resource_size_t __init at91_configure_usart0(unsigned pins)
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{
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at91_set_A_periph(AT91_PIN_PC8, 1); /* TXD0 */
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at91_set_A_periph(AT91_PIN_PC9, 0); /* RXD0 */
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if (pins & ATMEL_UART_RTS)
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at91_set_A_periph(AT91_PIN_PC10, 0); /* RTS0 */
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if (pins & ATMEL_UART_CTS)
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at91_set_A_periph(AT91_PIN_PC11, 0); /* CTS0 */
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return AT91SAM9261_BASE_US0;
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}
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resource_size_t __init at91_configure_usart1(unsigned pins)
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{
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at91_set_A_periph(AT91_PIN_PC12, 1); /* TXD1 */
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at91_set_A_periph(AT91_PIN_PC13, 0); /* RXD1 */
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if (pins & ATMEL_UART_RTS)
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at91_set_B_periph(AT91_PIN_PA12, 0); /* RTS1 */
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if (pins & ATMEL_UART_CTS)
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at91_set_B_periph(AT91_PIN_PA13, 0); /* CTS1 */
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return AT91SAM9261_BASE_US1;
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}
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resource_size_t __init at91_configure_usart2(unsigned pins)
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{
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at91_set_A_periph(AT91_PIN_PC15, 0); /* RXD2 */
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at91_set_A_periph(AT91_PIN_PC14, 1); /* TXD2 */
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if (pins & ATMEL_UART_RTS)
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at91_set_B_periph(AT91_PIN_PA15, 0); /* RTS2*/
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if (pins & ATMEL_UART_CTS)
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at91_set_B_periph(AT91_PIN_PA16, 0); /* CTS2 */
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return AT91SAM9261_BASE_US2;
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}
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#if defined(CONFIG_MCI_ATMEL)
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/* Consider only one slot : slot 0 */
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void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data)
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{
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struct device_d *dev;
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if (!data)
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return;
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/* need bus_width */
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if (!data->bus_width)
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return;
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/* input/irq */
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if (gpio_is_valid(data->detect_pin)) {
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at91_set_gpio_input(data->detect_pin, 1);
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at91_set_deglitch(data->detect_pin, 1);
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}
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if (gpio_is_valid(data->wp_pin))
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at91_set_gpio_input(data->wp_pin, 1);
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/* CLK */
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at91_set_B_periph(AT91_PIN_PA2, 0);
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/* CMD */
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at91_set_B_periph(AT91_PIN_PA1, 1);
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/* DAT0, maybe DAT1..DAT3 */
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at91_set_B_periph(AT91_PIN_PA0, 1);
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if (data->bus_width == 4) {
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at91_set_B_periph(AT91_PIN_PA4, 1);
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at91_set_B_periph(AT91_PIN_PA5, 1);
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at91_set_B_periph(AT91_PIN_PA6, 1);
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}
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dev = add_generic_device("atmel_mci", 0, NULL, AT91SAM9261_BASE_MCI, SZ_16K,
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IORESOURCE_MEM, data);
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}
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#else
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void at91_add_device_mci(short mmc_id, struct atmel_mci_platform_data *data) {}
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#endif
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