42 lines
1.1 KiB
ArmAsm
42 lines
1.1 KiB
ArmAsm
/*
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* (C) Copyright 2011 - Franck JULLIEN <elec4fun@gmail.com>
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*
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* Extracted from gcc generated assembly.
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*
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* Extended precision shifts.
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*
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* R3/R4 (MSW, LSW) has 64 bit value
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* R5 has shift count
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* result in R11/R12
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*
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*/
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.globl __lshrdi3
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__lshrdi3:
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l.sfeqi r5,0x0
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l.bf out /* if count = 0, go out */
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l.addi r6,r0,0x20 /* r6 = 32 */
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l.sub r6,r6,r5 /* r6 = 32 - count */
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l.sfgtsi r6,0x0 /* if count >= 32 */
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l.bnf more_than_32 /* branch to more_than_32 */
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l.nop 0x0
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less_than_32:
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l.sll r6,r3,r6 /* r6 gets the bits moved from MSW to LSW */
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l.srl r4,r4,r5 /* shift LSW */
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l.srl r3,r3,r5 /* shift MSW */
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l.or r4,r6,r4 /* LSW gets bits shifted from MSW */
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out:
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l.ori r11,r3,0x0
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l.jr r9
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l.ori r12,r4,0x0
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more_than_32:
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l.sub r4,r0,r6 /* r4 = -r6, the number of bits above 32 */
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l.srl r4,r3,r4 /* LSW = MSW >> r4 */
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l.j out /* go out */
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l.addi r3,r0,0x0 /* MSW = 0 */
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