323 lines
7.8 KiB
Plaintext
323 lines
7.8 KiB
Plaintext
/dts-v1/;
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#include "am33xx.dtsi"
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/ {
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model = "Phytec phyCORE AM335x";
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compatible = "phytec,phycore-am335x", "phytec,pcm051", "ti,am33xx";
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chosen {
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linux,stdout-path = &uart0;
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environment-spi {
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compatible = "barebox,environment";
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device-path = &flash, "partname:bareboxenv";
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status = "disabled";
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};
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environment-nand {
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compatible = "barebox,environment";
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device-path = &nand, "partname:bareboxenv";
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status = "disabled";
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};
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};
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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gpio-leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pcm051_led_pins>;
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led-green {
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label = "green";
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gpios = <&gpio1 30 0>;
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linux,default-trigger = "heartbeat";
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};
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led-amber {
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label = "amber";
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gpios = <&gpio1 31 1>;
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};
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};
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};
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&am33xx_pinmux {
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i2c0_pins: pinmux_i2c0_pins {
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pinctrl-single,pins = <
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0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
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0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
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>;
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};
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spi0_pins: pinmux_spi0_pins {
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pinctrl-single,pins = <
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0x150 (INPUT_EN | MUX_MODE0)
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0x154 (PULL_UP | INPUT_EN | MUX_MODE0)
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0x158 (INPUT_EN | MUX_MODE0)
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0x15c (PULL_UP | INPUT_EN | MUX_MODE0)
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>;
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};
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uart0_pins: pinmux_uart0_pins {
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pinctrl-single,pins = <
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0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
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0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
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>;
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};
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mmc1_pins: pinmux_mmc1_pins {
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pinctrl-single,pins = <
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0xf0 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat3.mmc0_dat3 */
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0xf4 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat2.mmc0_dat2 */
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0xf8 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat1.mmc0_dat1 */
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0xfc (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_dat0.mmc0_dat0 */
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0x100 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_clk.mmc0_clk */
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0x104 (MUX_MODE0 | INPUT_EN | PULL_UP) /* mmc0_cmd.mmc0_cmd */
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0x160 (MUX_MODE7 | INPUT_EN | PULL_UP) /* spi0_cs1.??, card detect */
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>;
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};
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emac_rmii1_pins: pinmux_emac_rmii1_pins {
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pinctrl-single,pins = <
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0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs_dv */
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0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
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0x114 (PIN_OUTPUT | MUX_MODE1) /* mii1_txen.rmii1_txen */
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0x124 (PIN_OUTPUT | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
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0x128 (PIN_OUTPUT | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
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0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
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0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
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0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */
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/* Slave 2 */
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0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
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0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
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0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
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0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
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0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
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0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
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0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
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0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
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0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
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0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
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0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
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0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
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>;
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};
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nandflash_pins_s0: nandflash_pins_s0 {
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pinctrl-single,pins = <
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0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
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0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
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0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
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0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
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0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
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0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
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0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
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0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
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0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
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0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
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0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
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0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
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0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
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0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
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0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
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>;
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};
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davinci_mdio_default: davinci_mdio_default {
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pinctrl-single,pins = <
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/* MDIO */
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0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
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0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
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>;
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};
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pcm051_led_pins: pinmux_pcm051_led_pins {
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pinctrl-single,pins = <
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0x80 (MUX_MODE7)
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0x84 (MUX_MODE7)
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>;
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};
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pcm051_user_pins: pinmux_pcm051_user_pins {
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pinctrl-single,pins = <
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0x1e4 (PULL_UP |INPUT_EN |MUX_MODE7)
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0x1e8 (PULL_UP |INPUT_EN |MUX_MODE7)
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>;
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};
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};
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&i2c0 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins>;
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status = "okay";
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clock-frequency = <400000>;
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eeprom: 24c02@50 {
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compatible = "atmel,24c02";
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pagesize = <8>;
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reg = <0x50>;
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};
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};
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&mmc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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status = "okay";
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_pins>;
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status = "okay";
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flash: m25p80 {
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compatible = "sst,sst25vf032b", "m25p80";
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spi-max-frequency = <15000000>;
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "xload";
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reg = <0x0 0x20000>;
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};
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partition@1 {
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label = "barebox";
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reg = <0x20000 0x80000>;
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};
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partition@2 {
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label = "bareboxenv";
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reg = <0xa0000 0x20000>;
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};
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partition@3 {
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label = "kernel";
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reg = <0xc0000 0x400000>;
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};
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};
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};
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&uart0 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart0_pins>;
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status = "okay";
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};
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&davinci_mdio {
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pinctrl-names = "default";
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pinctrl-0 = <&davinci_mdio_default>;
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status = "okay";
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};
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&phy_sel {
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rmii-clock-ext;
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};
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&cpsw_emac0 {
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phy_id = <&davinci_mdio>, <0>;
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phy-mode = "rmii";
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dual_emac_res_vlan = <1>;
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};
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&cpsw_emac1 {
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phy_id = <&davinci_mdio>, <2>;
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phy-mode = "rgmii";
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dual_emac_res_vlan = <2>;
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};
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&mac {
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pinctrl-names = "default";
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pinctrl-0 = <&emac_rmii1_pins>;
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dual_emac = <1>;
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status = "okay";
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};
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&gpmc {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&nandflash_pins_s0>;
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ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
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nand: nand@0,0 {
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reg = <0 0 0>; /* CS0, offset 0 */
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nand-bus-width = <8>;
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ti,nand-ecc-opt = "bch8-romcode";
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gpmc,device-nand = "true";
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gpmc,device-width = <1>;
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <30>;
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gpmc,cs-wr-off-ns = <30>;
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gpmc,adv-on-ns = <0>;
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gpmc,adv-rd-off-ns = <30>;
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gpmc,adv-wr-off-ns = <30>;
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gpmc,we-on-ns = <0>;
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gpmc,we-off-ns = <20>;
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gpmc,oe-on-ns = <10>;
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gpmc,oe-off-ns = <30>;
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gpmc,access-ns = <30>;
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gpmc,rd-cycle-ns = <30>;
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gpmc,wr-cycle-ns = <30>;
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gpmc,wait-pin = <1>;
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gpmc,wait-on-read = "true";
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gpmc,wait-on-write = "true";
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gpmc,bus-turnaround-ns = <0>;
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gpmc,cycle2cycle-delay-ns = <50>;
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gpmc,clk-activation-ns = <0>;
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gpmc,wait-monitoring-ns = <0>;
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gpmc,wr-access-ns = <0>;
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gpmc,wr-data-mux-bus-ns = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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elm_id = <&elm>;
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partition@0 {
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label = "xload";
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reg = <0x0 0x20000>;
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};
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partition@1 {
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label = "xload_backup1";
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reg = <0x20000 0x20000>;
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};
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partition@2 {
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label = "xload_backup2";
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reg = <0x40000 0x20000>;
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};
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partition@3 {
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label = "xload_backup3";
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reg = <0x60000 0x20000>;
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};
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partition@4 {
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label = "barebox";
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reg = <0x80000 0x80000>;
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};
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partition@5 {
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label = "bareboxenv";
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reg = <0x100000 0x20000>;
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};
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partition@6 {
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label = "backup_kernel";
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reg = <0x120000 0x800000>;
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};
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partition@7 {
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label = "root";
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reg = <0x920000 0x0>;
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};
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};
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};
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