The intel cfi buffer write has a problem with writing when the alignment of the buffer in memory is smaller than the flash bus width. This patch fixes a alignment problem which may show during this scenario: - 32 or 64 attached NOR flash - flashing an image directly from network to the nor flash The involved network driver is "smc9111.c". The data that comes from the network stack and should be written into the flash isn't 32 bit aligned (at least with this network driver). This is probably due to the 48 bit wide ethernet addresses. However the "cfi_flash.c" driver doesn't handle this situation, and accesses the not-aligned address with a 32 bit pointer. This patch fixes the problem by reducing the access width if an aligment problem between source and destination is found. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
174 lines
4.9 KiB
C
174 lines
4.9 KiB
C
#include <common.h>
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#include "cfi_flash.h"
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/*
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* read jedec ids from device and set corresponding fields in info struct
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*
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* Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
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*
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*/
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static void intel_read_jedec_ids (struct flash_info *info)
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{
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info->cmd_reset = FLASH_CMD_RESET;
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info->manufacturer_id = 0;
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info->device_id = 0;
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info->device_id2 = 0;
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flash_write_cmd(info, 0, 0, info->cmd_reset);
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flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
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udelay(1000); /* some flash are slow to respond */
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info->manufacturer_id = jedec_read_mfr(info);
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info->device_id = flash_read_uchar (info,
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FLASH_OFFSET_DEVICE_ID);
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flash_write_cmd(info, 0, 0, info->cmd_reset);
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}
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/*
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* flash_is_busy - check to see if the flash is busy
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* This routine checks the status of the chip and returns true if the chip is busy
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*/
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static int intel_flash_is_busy (struct flash_info *info, flash_sect_t sect)
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{
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return !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
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}
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static int intel_flash_erase_one (struct flash_info *info, long sect)
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{
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flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
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flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
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flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
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return flash_status_check(info, sect, info->erase_blk_tout, "erase");
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}
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static void intel_flash_prepare_write(struct flash_info *info)
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{
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flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
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flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
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}
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#ifdef CONFIG_CFI_BUFFER_WRITE
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static int intel_flash_write_cfibuffer (struct flash_info *info, ulong dest, const uchar * cp,
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int len)
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{
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flash_sect_t sector;
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int cnt;
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int retcode;
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void *src = (void*)cp;
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void *dst = (void *)dest;
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/* reduce width due to possible alignment problems */
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const unsigned long ptr = (unsigned long)dest | (unsigned long)cp | info->portwidth;
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const int width = ptr & -ptr;
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sector = find_sector (info, dest);
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flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
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flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
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retcode = flash_generic_status_check (info, sector, info->buffer_write_tout,
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"write to buffer");
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if (retcode != ERR_OK)
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return retcode;
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/* reduce the number of loops by the width of the port */
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cnt = len / width;
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flash_write_cmd(info, sector, 0, cnt - 1);
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while (cnt-- > 0) {
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switch (width) {
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case 1:
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flash_write8(flash_read8(src), dst);
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src += 1, dst += 1;
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break;
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case 2:
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flash_write16(flash_read16(src), dst);
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src += 2, dst += 2;
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break;
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case 4:
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flash_write32(flash_read32(src), dst);
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src += 4, dst += 4;
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break;
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case 8:
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flash_write64(flash_read64(src), dst);
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src += 8, dst += 8;
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break;
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}
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}
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flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM);
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retcode = flash_status_check (info, sector,
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info->buffer_write_tout,
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"buffer write");
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return retcode;
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}
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#else
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#define intel_flash_write_cfibuffer NULL
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#endif /* CONFIG_CFI_BUFFER_WRITE */
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static int intel_flash_status_check (struct flash_info *info, flash_sect_t sector,
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uint64_t tout, char *prompt)
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{
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int retcode;
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retcode = flash_generic_status_check (info, sector, tout, prompt);
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if ((retcode == ERR_OK)
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&& !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
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retcode = ERR_INVAL;
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printf ("Flash %s error at address %lx\n", prompt,
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info->start[sector]);
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if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
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puts ("Command Sequence Error.\n");
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} else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
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puts ("Block Erase Error.\n");
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retcode = ERR_NOT_ERASED;
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} else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
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puts ("Locking Error\n");
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}
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if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
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puts ("Block locked.\n");
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retcode = ERR_PROTECTED;
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}
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if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
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puts ("Vpp Low Error.\n");
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}
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flash_write_cmd (info, sector, 0, info->cmd_reset);
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return retcode;
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}
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static int intel_flash_real_protect (struct flash_info *info, long sector, int prot)
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{
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flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
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flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
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if (prot)
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flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
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else
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flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
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return 0;
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}
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static void intel_flash_fixup (struct flash_info *info, struct cfi_qry *qry)
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{
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#ifdef CFG_FLASH_PROTECTION
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/* read legacy lock/unlock bit from intel flash */
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if (info->ext_addr) {
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info->legacy_unlock = flash_read_uchar (info,
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info->ext_addr + 5) & 0x08;
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}
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#endif
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}
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struct cfi_cmd_set cfi_cmd_set_intel = {
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.flash_write_cfibuffer = intel_flash_write_cfibuffer,
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.flash_erase_one = intel_flash_erase_one,
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.flash_is_busy = intel_flash_is_busy,
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.flash_read_jedec_ids = intel_read_jedec_ids,
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.flash_prepare_write = intel_flash_prepare_write,
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.flash_status_check = intel_flash_status_check,
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.flash_real_protect = intel_flash_real_protect,
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.flash_fixup = intel_flash_fixup,
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};
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