806 lines
19 KiB
C
806 lines
19 KiB
C
#include <common.h>
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#include <init.h>
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#include <net.h>
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#include <linux/phy.h>
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#include <usb/usb.h>
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#include <usb/usbnet.h>
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#include <errno.h>
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#include <malloc.h>
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#include <asm/byteorder.h>
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/* ASIX AX8817X based USB 2.0 Ethernet Devices */
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#define AX_CMD_SET_SW_MII 0x06
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#define AX_CMD_READ_MII_REG 0x07
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#define AX_CMD_WRITE_MII_REG 0x08
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#define AX_CMD_SET_HW_MII 0x0a
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#define AX_CMD_READ_EEPROM 0x0b
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#define AX_CMD_WRITE_EEPROM 0x0c
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#define AX_CMD_WRITE_ENABLE 0x0d
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#define AX_CMD_WRITE_DISABLE 0x0e
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#define AX_CMD_READ_RX_CTL 0x0f
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#define AX_CMD_WRITE_RX_CTL 0x10
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#define AX_CMD_READ_IPG012 0x11
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#define AX_CMD_WRITE_IPG0 0x12
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#define AX_CMD_WRITE_IPG1 0x13
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#define AX_CMD_READ_NODE_ID 0x13
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#define AX_CMD_WRITE_IPG2 0x14
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#define AX_CMD_WRITE_MULTI_FILTER 0x16
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#define AX88172_CMD_READ_NODE_ID 0x17
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#define AX_CMD_READ_PHY_ID 0x19
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#define AX_CMD_READ_MEDIUM_STATUS 0x1a
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#define AX_CMD_WRITE_MEDIUM_MODE 0x1b
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#define AX_CMD_READ_MONITOR_MODE 0x1c
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#define AX_CMD_WRITE_MONITOR_MODE 0x1d
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#define AX_CMD_READ_GPIOS 0x1e
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#define AX_CMD_WRITE_GPIOS 0x1f
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#define AX_CMD_SW_RESET 0x20
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#define AX_CMD_SW_PHY_STATUS 0x21
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#define AX_CMD_SW_PHY_SELECT 0x22
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#define AX_MONITOR_MODE 0x01
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#define AX_MONITOR_LINK 0x02
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#define AX_MONITOR_MAGIC 0x04
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#define AX_MONITOR_HSFS 0x10
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/* AX88172 Medium Status Register values */
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#define AX88172_MEDIUM_FD 0x02
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#define AX88172_MEDIUM_TX 0x04
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#define AX88172_MEDIUM_FC 0x10
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#define AX88172_MEDIUM_DEFAULT \
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( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
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#define AX_MCAST_FILTER_SIZE 8
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#define AX_MAX_MCAST 64
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#define AX_SWRESET_CLEAR 0x00
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#define AX_SWRESET_RR 0x01
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#define AX_SWRESET_RT 0x02
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#define AX_SWRESET_PRTE 0x04
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#define AX_SWRESET_PRL 0x08
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#define AX_SWRESET_BZ 0x10
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#define AX_SWRESET_IPRL 0x20
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#define AX_SWRESET_IPPD 0x40
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#define AX88772_IPG0_DEFAULT 0x15
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#define AX88772_IPG1_DEFAULT 0x0c
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#define AX88772_IPG2_DEFAULT 0x12
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/* AX88772 & AX88178 Medium Mode Register */
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#define AX_MEDIUM_PF 0x0080
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#define AX_MEDIUM_JFE 0x0040
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#define AX_MEDIUM_TFC 0x0020
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#define AX_MEDIUM_RFC 0x0010
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#define AX_MEDIUM_ENCK 0x0008
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#define AX_MEDIUM_AC 0x0004
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#define AX_MEDIUM_FD 0x0002
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#define AX_MEDIUM_GM 0x0001
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#define AX_MEDIUM_SM 0x1000
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#define AX_MEDIUM_SBP 0x0800
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#define AX_MEDIUM_PS 0x0200
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#define AX_MEDIUM_RE 0x0100
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#define AX88178_MEDIUM_DEFAULT \
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(AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
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AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
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AX_MEDIUM_RE )
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#define AX88772_MEDIUM_DEFAULT \
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(AX_MEDIUM_FD | AX_MEDIUM_RFC | \
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AX_MEDIUM_TFC | AX_MEDIUM_PS | \
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AX_MEDIUM_AC | AX_MEDIUM_RE )
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/* AX88772 & AX88178 RX_CTL values */
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#define AX_RX_CTL_SO 0x0080
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#define AX_RX_CTL_AP 0x0020
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#define AX_RX_CTL_AM 0x0010
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#define AX_RX_CTL_AB 0x0008
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#define AX_RX_CTL_SEP 0x0004
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#define AX_RX_CTL_AMALL 0x0002
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#define AX_RX_CTL_PRO 0x0001
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#define AX_RX_CTL_MFB_2048 0x0000
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#define AX_RX_CTL_MFB_4096 0x0100
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#define AX_RX_CTL_MFB_8192 0x0200
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#define AX_RX_CTL_MFB_16384 0x0300
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#define AX_DEFAULT_RX_CTL \
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(AX_RX_CTL_SO | AX_RX_CTL_AB )
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/* GPIO 0 .. 2 toggles */
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#define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
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#define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
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#define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
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#define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
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#define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
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#define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
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#define AX_GPIO_RESERVED 0x40 /* Reserved */
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#define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
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#define AX_EEPROM_MAGIC 0xdeadbeef
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#define AX88172_EEPROM_LEN 0x40
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#define AX88772_EEPROM_LEN 0xff
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#define PHY_MODE_MARVELL 0x0000
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#define MII_MARVELL_LED_CTRL 0x0018
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#define MII_MARVELL_STATUS 0x001b
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#define MII_MARVELL_CTRL 0x0014
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#define MARVELL_LED_MANUAL 0x0019
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#define MARVELL_STATUS_HWCFG 0x0004
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#define MARVELL_CTRL_TXDELAY 0x0002
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#define MARVELL_CTRL_RXDELAY 0x0080
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#define FLAG_EEPROM_MAC (1UL << 0) /* init device MAC from eeprom */
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/* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
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struct asix_data {
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u8 multi_filter[AX_MCAST_FILTER_SIZE];
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u8 phymode;
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u8 ledmode;
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u8 eeprom_len;
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};
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struct ax88172_int_data {
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__le16 res1;
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u8 link;
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__le16 res2;
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u8 status;
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__le16 res3;
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} __attribute__ ((packed));
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static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
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u16 size, void *data)
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{
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void *buf;
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int err = -ENOMEM;
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dev_dbg(&dev->edev.dev, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
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cmd, value, index, size);
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buf = malloc(size);
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if (!buf)
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goto out;
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err = usb_control_msg(
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dev->udev,
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usb_rcvctrlpipe(dev->udev, 0),
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cmd,
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USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
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value,
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index,
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buf,
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size,
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USB_CTRL_GET_TIMEOUT);
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if (err == size)
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memcpy(data, buf, size);
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else if (err >= 0)
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err = -EINVAL;
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free(buf);
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out:
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return err;
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}
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static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
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u16 size, void *data)
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{
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void *buf = NULL;
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int err = -ENOMEM;
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dev_dbg(&dev->edev.dev, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
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cmd, value, index, size);
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if (data) {
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buf = malloc(size);
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if (!buf)
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goto out;
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memcpy(buf, data, size);
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}
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err = usb_control_msg(
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dev->udev,
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usb_sndctrlpipe(dev->udev, 0),
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cmd,
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USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
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value,
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index,
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buf,
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size,
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USB_CTRL_SET_TIMEOUT);
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free(buf);
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out:
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return err;
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}
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static inline int asix_set_sw_mii(struct usbnet *dev)
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{
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int ret;
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ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
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if (ret < 0)
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dev_err(&dev->edev.dev, "Failed to enable software MII access\n");
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return ret;
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}
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static inline int asix_set_hw_mii(struct usbnet *dev)
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{
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int ret;
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ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
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if (ret < 0)
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dev_err(&dev->edev.dev, "Failed to enable hardware MII access\n");
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return ret;
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}
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static int asix_mdio_read(struct mii_bus *bus, int phy_id, int loc)
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{
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struct usbnet *dev = bus->priv;
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__le16 res;
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asix_set_sw_mii(dev);
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asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
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(__u16)loc, 2, &res);
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asix_set_hw_mii(dev);
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dev_dbg(&dev->edev.dev, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
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phy_id, loc, le16_to_cpu(res));
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return le16_to_cpu(res);
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}
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static int asix_mdio_write(struct mii_bus *bus, int phy_id, int loc, u16 val)
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{
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struct usbnet *dev = bus->priv;
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__le16 res = cpu_to_le16(val);
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dev_dbg(&dev->edev.dev, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
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phy_id, loc, val);
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asix_set_sw_mii(dev);
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asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
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asix_set_hw_mii(dev);
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return 0;
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}
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static inline int asix_get_phy_addr(struct usbnet *dev)
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{
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u8 buf[2];
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int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
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dev_dbg(&dev->edev.dev, "asix_get_phy_addr()");
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if (ret < 0) {
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dev_err(&dev->edev.dev, "Error reading PHYID register: %02x\n", ret);
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goto out;
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}
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dev_dbg(&dev->edev.dev, "asix_get_phy_addr() returning 0x%04x\n", *((__le16 *)buf));
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ret = buf[1];
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out:
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return ret;
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}
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static int asix_sw_reset(struct usbnet *dev, u8 flags)
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{
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int ret;
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ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
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if (ret < 0)
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dev_err(&dev->edev.dev, "Failed to send software reset: %02x\n", ret);
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return ret;
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}
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static u16 asix_read_rx_ctl(struct usbnet *dev)
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{
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__le16 v;
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int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
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if (ret < 0) {
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dev_err(&dev->edev.dev, "Error reading RX_CTL register: %02x\n", ret);
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goto out;
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}
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ret = le16_to_cpu(v);
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out:
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return ret;
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}
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static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
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{
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int ret;
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dev_dbg(&dev->edev.dev, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
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ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
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if (ret < 0)
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dev_err(&dev->edev.dev, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
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mode, ret);
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return ret;
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}
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static u16 asix_read_medium_status(struct usbnet *dev)
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{
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__le16 v;
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int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
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if (ret < 0) {
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dev_err(&dev->edev.dev, "Error reading Medium Status register: %02x\n", ret);
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goto out;
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}
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ret = le16_to_cpu(v);
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out:
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return ret;
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}
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static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
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{
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int ret;
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dev_dbg(&dev->edev.dev, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
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ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
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if (ret < 0)
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dev_err(&dev->edev.dev, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
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mode, ret);
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return ret;
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}
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static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
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{
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int ret;
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dev_dbg(&dev->edev.dev,"asix_write_gpio() - value = 0x%04x\n", value);
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ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
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if (ret < 0)
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dev_err(&dev->edev.dev, "Failed to write GPIO value 0x%04x: %02x\n",
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value, ret);
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if (sleep)
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mdelay(sleep);
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return ret;
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}
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static int asix_get_ethaddr(struct eth_device *edev, unsigned char *adr)
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{
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struct usbnet *udev = container_of(edev, struct usbnet, edev);
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int i, ret;
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/* Get the MAC address */
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if (udev->driver_info->data & FLAG_EEPROM_MAC) {
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for (i = 0; i < (6 >> 1); i++) {
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ret = asix_read_cmd(udev, AX_CMD_READ_EEPROM, 0x04 + i,
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0, 2, adr + i * 2);
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if (ret < 0)
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break;
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}
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} else {
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ret = asix_read_cmd(udev, AX_CMD_READ_NODE_ID, 0, 0, 6, adr);
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}
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if (ret < 0) {
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debug("Failed to read MAC address: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static int asix_set_ethaddr(struct eth_device *edev, unsigned char *adr)
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{
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/* not possible? */
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return 0;
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}
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static int ax88172_get_ethaddr(struct eth_device *edev, unsigned char *adr)
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{
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struct usbnet *udev = container_of(edev, struct usbnet, edev);
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int ret;
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/* Get the MAC address */
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if ((ret = asix_read_cmd(udev, AX88172_CMD_READ_NODE_ID,
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0, 0, 6, adr)) < 0) {
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debug("read AX_CMD_READ_NODE_ID failed: %d\n", ret);
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return ret;
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}
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return 0;
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}
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static int asix_rx_fixup(struct usbnet *dev, void *buf, int len)
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{
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unsigned int header;
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unsigned short size;
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memcpy(&header, (void*) buf, sizeof(header));
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le32_to_cpus(&header);
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buf += 4;
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len -= 4;
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while (len > 0) {
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if ((header & 0x07ff) != ((~header >> 16) & 0x07ff))
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dev_err(&dev->edev.dev, "asix_rx_fixup() Bad Header Length\n");
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/* get the packet length */
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size = (unsigned short) (header & 0x07ff);
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if (size > 1514) {
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dev_err(&dev->edev.dev, "asix_rx_fixup() Bad RX Length %d\n", size);
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return 0;
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}
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net_receive(&dev->edev, buf, size);
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buf += ((size + 1) & 0xfffe);
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len -= ((size + 1) & 0xfffe);
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if (len == 0)
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break;
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memcpy(&header, (void*) buf, sizeof(header));
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le32_to_cpus(&header);
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buf += 4;
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len -= 4;
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}
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if (len < 0) {
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dev_err(&dev->edev.dev,"asix_rx_fixup() Bad SKB Length %d\n", len);
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return -1;
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}
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return 0;
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}
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static int asix_tx_fixup(struct usbnet *dev,
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void *buf, int len,
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void *nbuf, int *nlen)
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{
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unsigned int packet_len;
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memmove(nbuf + 4, buf, len);
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packet_len = ((len ^ 0x0000ffff) << 16) + len;
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cpu_to_le32s(&packet_len);
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memcpy(nbuf, &packet_len, 4);
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len += 4;
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if((len % 512) == 0) {
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unsigned int padbytes = 0xffff0000;
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cpu_to_le32s(&padbytes);
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memcpy(nbuf + len, &padbytes, 4);
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len += 4;
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}
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*nlen = len;
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return 0;
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}
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static int asix_init_mii(struct usbnet *dev)
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{
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dev->miibus.read = asix_mdio_read;
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dev->miibus.write = asix_mdio_write;
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dev->phy_addr = asix_get_phy_addr(dev);
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dev->miibus.priv = dev;
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dev->miibus.parent = &dev->udev->dev;
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|
|
|
return mdiobus_register(&dev->miibus);
|
|
}
|
|
|
|
static int ax88172_link_reset(struct usbnet *dev)
|
|
{
|
|
u8 mode;
|
|
|
|
mode = AX88172_MEDIUM_DEFAULT;
|
|
|
|
// if (ecmd.duplex != DUPLEX_FULL)
|
|
// mode |= ~AX88172_MEDIUM_FD;
|
|
|
|
asix_write_medium_mode(dev, mode);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ax88172_bind(struct usbnet *dev)
|
|
{
|
|
int ret = 0;
|
|
int i;
|
|
unsigned long gpio_bits = dev->driver_info->data;
|
|
struct asix_data *data = (struct asix_data *)&dev->data;
|
|
|
|
dev_dbg(&dev->edev.dev, "%s\n", __func__);
|
|
|
|
data->eeprom_len = AX88172_EEPROM_LEN;
|
|
|
|
ret = usbnet_get_endpoints(dev);
|
|
if (ret) {
|
|
dev_err(&dev->edev.dev, "can not get EPs\n");
|
|
return ret;
|
|
}
|
|
|
|
/* Toggle the GPIOs in a manufacturer/model specific way */
|
|
for (i = 2; i >= 0; i--) {
|
|
if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
|
|
(gpio_bits >> (i * 8)) & 0xff, 0, 0,
|
|
NULL)) < 0)
|
|
goto out;
|
|
mdelay(5);
|
|
}
|
|
|
|
if ((ret = asix_write_rx_ctl(dev, 0x80)) < 0)
|
|
goto out;
|
|
|
|
dev->edev.get_ethaddr = ax88172_get_ethaddr;
|
|
dev->edev.set_ethaddr = asix_set_ethaddr;
|
|
asix_init_mii(dev);
|
|
|
|
return 0;
|
|
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static int ax88772_bind(struct usbnet *dev)
|
|
{
|
|
int ret, embd_phy;
|
|
u16 rx_ctl;
|
|
struct asix_data *data = (struct asix_data *)&dev->data;
|
|
|
|
debug("%s\n", __func__);
|
|
|
|
data->eeprom_len = AX88772_EEPROM_LEN;
|
|
|
|
usbnet_get_endpoints(dev);
|
|
|
|
if ((ret = asix_write_gpio(dev,
|
|
AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5)) < 0)
|
|
goto out;
|
|
|
|
/* 0x10 is the phy id of the embedded 10/100 ethernet phy */
|
|
embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
|
|
if ((ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT,
|
|
embd_phy, 0, 0, NULL)) < 0) {
|
|
debug("Select PHY #1 failed: %d\n", ret);
|
|
goto out;
|
|
}
|
|
|
|
if ((ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL)) < 0)
|
|
goto out;
|
|
|
|
mdelay(150);
|
|
if ((ret = asix_sw_reset(dev, AX_SWRESET_CLEAR)) < 0)
|
|
goto out;
|
|
|
|
mdelay(150);
|
|
if (embd_phy) {
|
|
if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL)) < 0)
|
|
goto out;
|
|
}
|
|
else {
|
|
if ((ret = asix_sw_reset(dev, AX_SWRESET_PRTE)) < 0)
|
|
goto out;
|
|
}
|
|
|
|
mdelay(150);
|
|
rx_ctl = asix_read_rx_ctl(dev);
|
|
debug("RX_CTL is 0x%04x after software reset\n", rx_ctl);
|
|
if ((ret = asix_write_rx_ctl(dev, 0x0000)) < 0)
|
|
goto out;
|
|
|
|
rx_ctl = asix_read_rx_ctl(dev);
|
|
debug("RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
|
|
|
|
dev->edev.get_ethaddr = asix_get_ethaddr;
|
|
dev->edev.set_ethaddr = asix_set_ethaddr;
|
|
asix_init_mii(dev);
|
|
|
|
if ((ret = asix_sw_reset(dev, AX_SWRESET_PRL)) < 0)
|
|
goto out;
|
|
|
|
mdelay(150);
|
|
|
|
if ((ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL)) < 0)
|
|
goto out;
|
|
|
|
mdelay(150);
|
|
|
|
if ((ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT)) < 0)
|
|
goto out;
|
|
|
|
if ((ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
|
|
AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
|
|
AX88772_IPG2_DEFAULT, 0, NULL)) < 0) {
|
|
debug("Write IPG,IPG1,IPG2 failed: %d\n", ret);
|
|
goto out;
|
|
}
|
|
|
|
/* Set RX_CTL to default values with 2k buffer, and enable cactus */
|
|
if ((ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL)) < 0)
|
|
goto out;
|
|
|
|
rx_ctl = asix_read_rx_ctl(dev);
|
|
debug("RX_CTL is 0x%04x after all initializations\n", rx_ctl);
|
|
|
|
rx_ctl = asix_read_medium_status(dev);
|
|
debug("Medium Status is 0x%04x after all initializations\n", rx_ctl);
|
|
|
|
/* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
|
|
if (dev->driver_info->flags & FLAG_FRAMING_AX) {
|
|
/* hard_mtu is still the default - the device does not support
|
|
jumbo eth frames */
|
|
dev->rx_urb_size = 2048;
|
|
}
|
|
|
|
return 0;
|
|
|
|
out:
|
|
return ret;
|
|
}
|
|
|
|
static void asix_unbind(struct usbnet *dev)
|
|
{
|
|
mdiobus_unregister(&dev->miibus);
|
|
}
|
|
|
|
static struct driver_info ax8817x_info = {
|
|
.description = "ASIX AX8817x USB 2.0 Ethernet",
|
|
.bind = ax88172_bind,
|
|
.unbind = asix_unbind,
|
|
.link_reset = ax88172_link_reset,
|
|
.reset = ax88172_link_reset,
|
|
.flags = FLAG_ETHER,
|
|
.data = 0x00130103,
|
|
};
|
|
|
|
static struct driver_info dlink_dub_e100_info = {
|
|
.description = "DLink DUB-E100 USB Ethernet",
|
|
.bind = ax88172_bind,
|
|
.unbind = asix_unbind,
|
|
.link_reset = ax88172_link_reset,
|
|
.reset = ax88172_link_reset,
|
|
.flags = FLAG_ETHER,
|
|
.data = 0x009f9d9f,
|
|
};
|
|
|
|
static struct driver_info netgear_fa120_info = {
|
|
.description = "Netgear FA-120 USB Ethernet",
|
|
.bind = ax88172_bind,
|
|
.unbind = asix_unbind,
|
|
.link_reset = ax88172_link_reset,
|
|
.reset = ax88172_link_reset,
|
|
.flags = FLAG_ETHER,
|
|
.data = 0x00130103,
|
|
};
|
|
|
|
static struct driver_info hawking_uf200_info = {
|
|
.description = "Hawking UF200 USB Ethernet",
|
|
.bind = ax88172_bind,
|
|
.unbind = asix_unbind,
|
|
.link_reset = ax88172_link_reset,
|
|
.reset = ax88172_link_reset,
|
|
.flags = FLAG_ETHER,
|
|
.data = 0x001f1d1f,
|
|
};
|
|
|
|
static struct driver_info ax88772_info = {
|
|
.description = "ASIX AX88772 USB 2.0 Ethernet",
|
|
.bind = ax88772_bind,
|
|
.unbind = asix_unbind,
|
|
.flags = FLAG_ETHER | FLAG_FRAMING_AX,
|
|
.rx_fixup = asix_rx_fixup,
|
|
.tx_fixup = asix_tx_fixup,
|
|
};
|
|
|
|
static struct driver_info ax88772b_info = {
|
|
.description = "ASIX AX88772B USB 2.0 Ethernet",
|
|
.bind = ax88772_bind,
|
|
.unbind = asix_unbind,
|
|
.flags = FLAG_ETHER | FLAG_FRAMING_AX,
|
|
.rx_fixup = asix_rx_fixup,
|
|
.tx_fixup = asix_tx_fixup,
|
|
.data = FLAG_EEPROM_MAC,
|
|
};
|
|
|
|
static const struct usb_device_id products [] = {
|
|
{
|
|
// Linksys USB200M
|
|
USB_DEVICE (0x077b, 0x2226),
|
|
.driver_info = &ax8817x_info,
|
|
}, {
|
|
// Netgear FA120
|
|
USB_DEVICE (0x0846, 0x1040),
|
|
.driver_info = &netgear_fa120_info,
|
|
}, {
|
|
// DLink DUB-E100
|
|
USB_DEVICE (0x2001, 0x1a00),
|
|
.driver_info = &dlink_dub_e100_info,
|
|
}, {
|
|
// Intellinet, ST Lab USB Ethernet
|
|
USB_DEVICE (0x0b95, 0x1720),
|
|
.driver_info = &ax8817x_info,
|
|
}, {
|
|
// Hawking UF200, TrendNet TU2-ET100
|
|
USB_DEVICE (0x07b8, 0x420a),
|
|
.driver_info = &hawking_uf200_info,
|
|
}, {
|
|
// Billionton Systems, USB2AR
|
|
USB_DEVICE (0x08dd, 0x90ff),
|
|
.driver_info = &ax8817x_info,
|
|
}, {
|
|
// ATEN UC210T
|
|
USB_DEVICE (0x0557, 0x2009),
|
|
.driver_info = &ax8817x_info,
|
|
}, {
|
|
// Buffalo LUA-U2-KTX
|
|
USB_DEVICE (0x0411, 0x003d),
|
|
.driver_info = &ax8817x_info,
|
|
}, {
|
|
// Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
|
|
USB_DEVICE (0x6189, 0x182d),
|
|
.driver_info = &ax8817x_info,
|
|
}, {
|
|
// corega FEther USB2-TX
|
|
USB_DEVICE (0x07aa, 0x0017),
|
|
.driver_info = &ax8817x_info,
|
|
}, {
|
|
// Surecom EP-1427X-2
|
|
USB_DEVICE (0x1189, 0x0893),
|
|
.driver_info = &ax8817x_info,
|
|
}, {
|
|
// goodway corp usb gwusb2e
|
|
USB_DEVICE (0x1631, 0x6200),
|
|
.driver_info = &ax8817x_info,
|
|
}, {
|
|
// JVC MP-PRX1 Port Replicator
|
|
USB_DEVICE (0x04f1, 0x3008),
|
|
.driver_info = &ax8817x_info,
|
|
}, {
|
|
// ASIX AX88772 10/100
|
|
USB_DEVICE (0x0b95, 0x7720),
|
|
.driver_info = &ax88772_info,
|
|
}, {
|
|
// Linksys USB200M Rev 2
|
|
USB_DEVICE (0x13b1, 0x0018),
|
|
.driver_info = &ax88772_info,
|
|
}, {
|
|
// 0Q0 cable ethernet
|
|
USB_DEVICE (0x1557, 0x7720),
|
|
.driver_info = &ax88772_info,
|
|
}, {
|
|
// DLink DUB-E100 H/W Ver B1
|
|
USB_DEVICE (0x07d1, 0x3c05),
|
|
.driver_info = &ax88772_info,
|
|
}, {
|
|
// DLink DUB-E100 H/W Ver B1 Alternate
|
|
USB_DEVICE (0x2001, 0x3c05),
|
|
.driver_info = &ax88772_info,
|
|
}, {
|
|
// Apple USB Ethernet Adapter
|
|
USB_DEVICE(0x05ac, 0x1402),
|
|
.driver_info = &ax88772_info,
|
|
}, {
|
|
// Cables-to-Go USB Ethernet Adapter
|
|
USB_DEVICE(0x0b95, 0x772a),
|
|
.driver_info = &ax88772_info,
|
|
}, {
|
|
// LevelOne USB Fast Ethernet Adapter
|
|
USB_DEVICE(0x0b95, 0x772b),
|
|
.driver_info = &ax88772b_info,
|
|
},
|
|
{ }, // END
|
|
};
|
|
|
|
static struct usb_driver asix_driver = {
|
|
.name = "asix",
|
|
.id_table = products,
|
|
.probe = usbnet_probe,
|
|
.disconnect = usbnet_disconnect,
|
|
};
|
|
|
|
static int __init asix_init(void)
|
|
{
|
|
return usb_driver_register(&asix_driver);
|
|
}
|
|
device_initcall(asix_init);
|