152 lines
3.8 KiB
C
152 lines
3.8 KiB
C
/*
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* (C) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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* Board support for Phytec's, i.MX31 based CPU card, called: PCM037
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*/
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#include <common.h>
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#include <init.h>
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#include <driver.h>
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#include <environment.h>
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#include <asm/arch/imx-regs.h>
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#include <asm/arch/gpio.h>
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#include <asm/io.h>
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#include <partition.h>
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/*
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* Up to 64MiB NOR type flash, connected to
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* CS line 0, data width is 16 bit
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*/
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static struct device_d cfi_dev = {
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.name = "cfi_flash",
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.id = "nor0",
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.map_base = IMX_CS0_BASE,
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.size = IMX_CS0_RANGE, /* area size */
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};
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/*
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* up to 2MiB static RAM type memory, connected
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* to CS4, data width is 16 bit
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*/
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static struct device_d sram_dev = {
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.name = "sram",
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.id = "sram0",
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.map_base = IMX_CS4_BASE,
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.size = IMX_CS4_RANGE, /* area size */
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};
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/*
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* ?MiB NAND type flash, data width 8 bit
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*/
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static struct device_d nand_dev = {
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.name = "cfi_flash_nand",
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.id = "nand0",
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.map_base = 0x10000000, /* FIXME */
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.size = 16 * 1024 * 1024, /* FIXME */
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};
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/*
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* SMSC 9217 network controller
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* connected to CS line 1 and interrupt line
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* GPIO3, data width is 16 bit
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*/
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static struct device_d network_dev = {
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.name = "smc911x",
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.id = "eth0",
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.map_base = IMX_CS1_BASE,
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.size = IMX_CS1_RANGE, /* area size */
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.type = DEVICE_TYPE_ETHER,
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};
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/*
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* 128MiB of SDRAM, data width is 32 bit
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*/
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static struct device_d sdram_dev = {
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.name = "ram",
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.id = "ram0",
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.map_base = IMX_SDRAM_CS0,
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.size = 128 * 1024 * 1024, /* fix size */
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.type = DEVICE_TYPE_DRAM,
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};
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static int imx31_devices_init(void)
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{
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__REG(CSCR_U(0)) = 0x0000cf03; /* CS0: Nor Flash */
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__REG(CSCR_L(0)) = 0x10000d03;
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__REG(CSCR_A(0)) = 0x00720900;
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__REG(CSCR_U(1)) = 0x0000df06; /* CS1: Network Controller */
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__REG(CSCR_L(1)) = 0x444a4541;
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__REG(CSCR_A(1)) = 0x44443302;
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__REG(CSCR_U(4)) = 0x0000d843; /* CS4: SRAM */
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__REG(CSCR_L(4)) = 0x22252521;
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__REG(CSCR_A(4)) = 0x22220a00;
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/* setup pins for I2C2 (for EEPROM, RTC) */
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imx_gpio_mode(MUX_CSPI2_MOSI_I2C2_SCL);
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imx_gpio_mode(MUX_CSPI2_MISO_I2C2_SCL);
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register_device(&cfi_dev);
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/*
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* Create partitions that should be
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* not touched by any regular user
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*/
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dev_add_partition(&cfi_dev, 0x00000, 0x20000, PARTITION_FIXED, "self"); /* ourself */
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dev_add_partition(&cfi_dev, 0x20000, 0x20000, PARTITION_FIXED, "env"); /* environment */
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dev_protect(&cfi_dev, 0x20000, 0, 1);
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register_device(&sram_dev);
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register_device(&nand_dev);
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register_device(&network_dev);
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register_device(&sdram_dev);
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return 0;
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}
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device_initcall(imx31_devices_init);
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static struct device_d imx31_serial_device = {
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.name = "imx_serial",
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.id = "cs0",
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.map_base = IMX_UART1_BASE,
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.size = 16 * 1024,
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.type = DEVICE_TYPE_CONSOLE,
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};
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static int imx31_console_init(void)
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{
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/* init gpios for serial port */
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imx_gpio_mode(MUX_RXD1_UART1_RXD_MUX);
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imx_gpio_mode(MUX_TXD1_UART1_TXD_MUX);
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imx_gpio_mode(MUX_RTS1_UART1_RTS_B);
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imx_gpio_mode(MUX_RTS1_UART1_CTS_B);
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register_device(&imx31_serial_device);
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return 0;
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}
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console_initcall(imx31_console_init);
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