112 lines
4.9 KiB
C
112 lines
4.9 KiB
C
/*
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* (C) Copyright 2003-2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2006
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* Eric Schumann, Phytec Messatechnik GmbH
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/arch/mpc5xxx.h>
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/* #define DEBUG */
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/*------------------------------------------------------------------------------------------------------------------------------------------------------
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High Level Configuration Options
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(easy to change)
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------------------------------------------------------------------------------------------------------------------------------------------------------*/
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#define CONFIG_MPC5200_DDR 1 /* (with DDR-SDRAM) */
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#define CFG_MPC5XXX_CLKIN 33333333 /* ... running at 33.333333MHz */
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#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
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#define BOOTFLAG_WARM 0x02 /* Software reboot */
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/*------------------------------------------------------------------------------------------------------------------------------------------------------
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Serial console configuration
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------------------------------------------------------------------------------------------------------------------------------------------------------*/
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#if (TEXT_BASE == 0xFF000000) /* Boot low */
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#define CFG_LOWBOOT 1
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#endif
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/* RAMBOOT will be defined automatically in memory section */
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/*------------------------------------------------------------------------------------------------------------------------------------------------------
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IPB Bus clocking configuration.
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------------------------------------------------------------------------------------------------------------------------------------------------------*/
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#define CFG_IPBSPEED_133 /* define for 133MHz speed */
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#if defined(CFG_IPBSPEED_133)
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/*
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* PCI Bus clocking configuration
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*
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* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
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* CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
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* been tested with a IPB Bus Clock of 66 MHz.
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*/
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#define CFG_PCISPEED_66 /* define for 66MHz speed */
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#else
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#undef CFG_PCISPEED_66 /* for 33MHz speed */
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#endif
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/* we only use CS-Boot */
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#define CFG_BOOTCS_START 0xFF000000
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#define CFG_BOOTCS_SIZE 0x01000000
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#if CONFIG_MACH_PHYCORE_MPC5200B_TINY_REV == 1
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#define CFG_BOOTCS_CFG 0x0008FD00
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#else
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#define CFG_BOOTCS_CFG 0x00083800
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#endif
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/*------------------------------------------------------------------------------------------------------------------------------------------------------
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Memory map
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------------------------------------------------------------------------------------------------------------------------------------------------------*/
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#define CFG_MBAR 0xF0000000 /* MBAR hast to be switched by other bootloader or debugger config */
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#define CFG_SDRAM_BASE 0x00000000
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/* Use SRAM until RAM will be available */
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#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
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#define CFG_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE /* End of used area in DPRAM */
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#define CONFIG_EARLY_INITDATA_SIZE 0x100
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#define CFG_MALLOC_LEN (8 << 20) /* Reserve 8 MB for malloc() */
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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/*------------------------------------------------------------------------------------------------------------------------------------------------------
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GPIO configuration
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------------------------------------------------------------------------------------------------------------------------------------------------------*/
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#define CFG_GPS_PORT_CONFIG 0x00558c10 /* PSC6=UART, PSC3=UART ; Ether=100MBit with MD */
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/*------------------------------------------------------------------------------------------------------------------------------------------------------
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Various low-level settings
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------------------------------------------------------------------------------------------------------------------------------------------------------*/
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#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
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#define CFG_HID0_FINAL HID0_ICE
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#define CFG_CS_BURST 0x00000000
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#define CFG_CS_DEADCYCLE 0x33333333
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#define OF_CPU "PowerPC,5200@0"
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#define OF_TBCLK CFG_MPC5XXX_CLKIN
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#define OF_SOC "soc5200@f0000000"
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#endif /* __CONFIG_H */
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