431 lines
9.2 KiB
C
431 lines
9.2 KiB
C
/*
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* Generic driver for memory-mapped GPIO controllers.
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*
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* Based on linux driver by:
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* Copyright 2008 MontaVista Software, Inc.
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* Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <init.h>
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#include <malloc.h>
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#include <linux/err.h>
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#include <linux/log2.h>
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#include <linux/err.h>
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#include <linux/basic_mmio_gpio.h>
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static void bgpio_write8(void __iomem *reg, unsigned int data)
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{
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writeb(data, reg);
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}
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static unsigned int bgpio_read8(void __iomem *reg)
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{
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return readb(reg);
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}
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static void bgpio_write16(void __iomem *reg, unsigned int data)
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{
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writew(data, reg);
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}
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static unsigned int bgpio_read16(void __iomem *reg)
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{
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return readw(reg);
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}
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static void bgpio_write32(void __iomem *reg, unsigned int data)
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{
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writel(data, reg);
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}
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static unsigned int bgpio_read32(void __iomem *reg)
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{
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return readl(reg);
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}
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static unsigned int bgpio_pin2mask(struct bgpio_chip *bgc, unsigned int pin)
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{
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return 1 << pin;
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}
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static unsigned int bgpio_pin2mask_be(struct bgpio_chip *bgc, unsigned int pin)
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{
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return 1 << (bgc->bits - 1 - pin);
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}
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static int bgpio_get(struct gpio_chip *gc, unsigned int gpio)
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{
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struct bgpio_chip *bgc = to_bgpio_chip(gc);
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return bgc->read_reg(bgc->reg_dat) & bgc->pin2mask(bgc, gpio);
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}
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static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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struct bgpio_chip *bgc = to_bgpio_chip(gc);
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unsigned int mask = bgc->pin2mask(bgc, gpio);
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if (val)
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bgc->data |= mask;
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else
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bgc->data &= ~mask;
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bgc->write_reg(bgc->reg_dat, bgc->data);
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}
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static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio,
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int val)
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{
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struct bgpio_chip *bgc = to_bgpio_chip(gc);
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unsigned int mask = bgc->pin2mask(bgc, gpio);
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if (val)
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bgc->write_reg(bgc->reg_set, mask);
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else
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bgc->write_reg(bgc->reg_clr, mask);
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}
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static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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struct bgpio_chip *bgc = to_bgpio_chip(gc);
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unsigned int mask = bgc->pin2mask(bgc, gpio);
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if (val)
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bgc->data |= mask;
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else
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bgc->data &= ~mask;
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bgc->write_reg(bgc->reg_set, bgc->data);
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}
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static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio)
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{
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return 0;
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}
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static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio,
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int val)
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{
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gc->ops->set(gc, gpio, val);
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return 0;
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}
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static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
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{
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struct bgpio_chip *bgc = to_bgpio_chip(gc);
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bgc->dir &= ~bgc->pin2mask(bgc, gpio);
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bgc->write_reg(bgc->reg_dir, bgc->dir);
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return 0;
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}
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static int bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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struct bgpio_chip *bgc = to_bgpio_chip(gc);
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gc->ops->set(gc, gpio, val);
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bgc->dir |= bgc->pin2mask(bgc, gpio);
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bgc->write_reg(bgc->reg_dir, bgc->dir);
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return 0;
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}
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static int bgpio_dir_in_inv(struct gpio_chip *gc, unsigned int gpio)
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{
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struct bgpio_chip *bgc = to_bgpio_chip(gc);
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bgc->dir |= bgc->pin2mask(bgc, gpio);
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bgc->write_reg(bgc->reg_dir, bgc->dir);
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return 0;
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}
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static int bgpio_dir_out_inv(struct gpio_chip *gc, unsigned int gpio, int val)
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{
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struct bgpio_chip *bgc = to_bgpio_chip(gc);
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gc->ops->set(gc, gpio, val);
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bgc->dir &= ~bgc->pin2mask(bgc, gpio);
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bgc->write_reg(bgc->reg_dir, bgc->dir);
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return 0;
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}
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static int bgpio_setup_accessors(struct device_d *dev, struct bgpio_chip *bgc,
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bool be)
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{
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switch (bgc->bits) {
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case 8:
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bgc->read_reg = bgpio_read8;
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bgc->write_reg = bgpio_write8;
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break;
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case 16:
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bgc->read_reg = bgpio_read16;
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bgc->write_reg = bgpio_write16;
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break;
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case 32:
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bgc->read_reg = bgpio_read32;
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bgc->write_reg = bgpio_write32;
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break;
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default:
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dev_err(dev, "Unsupported data width %u bits\n", bgc->bits);
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return -EINVAL;
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}
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bgc->pin2mask = be ? bgpio_pin2mask_be : bgpio_pin2mask;
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return 0;
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}
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/*
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* Create the device and allocate the resources. For setting GPIO's there are
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* three supported configurations:
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*
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* - single input/output register resource (named "dat").
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* - set/clear pair (named "set" and "clr").
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* - single output register resource and single input resource ("set" and
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* dat").
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*
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* For the single output register, this drives a 1 by setting a bit and a zero
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* by clearing a bit. For the set clr pair, this drives a 1 by setting a bit
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* in the set register and clears it by setting a bit in the clear register.
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* The configuration is detected by which resources are present.
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*
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* For setting the GPIO direction, there are three supported configurations:
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*
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* - simple bidirection GPIO that requires no configuration.
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* - an output direction register (named "dirout") where a 1 bit
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* indicates the GPIO is an output.
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* - an input direction register (named "dirin") where a 1 bit indicates
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* the GPIO is an input.
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*/
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static int bgpio_setup_io(struct bgpio_chip *bgc,
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void __iomem *dat,
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void __iomem *set,
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void __iomem *clr)
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{
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if (!dat)
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return -EINVAL;
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bgc->reg_dat = dat;
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if (set && clr) {
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bgc->reg_set = set;
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bgc->reg_clr = clr;
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bgc->gc.ops->set = bgpio_set_with_clear;
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} else if (set && !clr) {
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bgc->reg_set = set;
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bgc->gc.ops->set = bgpio_set_set;
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} else
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bgc->gc.ops->set = bgpio_set;
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bgc->gc.ops->get = bgpio_get;
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return 0;
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}
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static int bgpio_setup_direction(struct bgpio_chip *bgc,
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void __iomem *dirout,
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void __iomem *dirin)
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{
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if (dirout && dirin)
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return -EINVAL;
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if (dirout) {
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bgc->reg_dir = dirout;
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bgc->gc.ops->direction_output = bgpio_dir_out;
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bgc->gc.ops->direction_input = bgpio_dir_in;
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} else if (dirin) {
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bgc->reg_dir = dirin;
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bgc->gc.ops->direction_output = bgpio_dir_out_inv;
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bgc->gc.ops->direction_input = bgpio_dir_in_inv;
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} else {
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bgc->gc.ops->direction_output = bgpio_simple_dir_out;
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bgc->gc.ops->direction_input = bgpio_simple_dir_in;
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}
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return 0;
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}
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int bgpio_init(struct bgpio_chip *bgc, struct device_d *dev,
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unsigned int sz, void __iomem *dat, void __iomem *set,
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void __iomem *clr, void __iomem *dirout, void __iomem *dirin,
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unsigned long flags)
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{
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int ret;
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if ((sz > 4) || !is_power_of_2(sz))
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return -EINVAL;
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bgc->bits = sz * 8;
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bgc->gc.ngpio = bgc->bits;
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bgc->gc.base = -1;
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bgc->gc.dev = dev;
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bgc->gc.ops = &bgc->ops;
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ret = bgpio_setup_io(bgc, dat, set, clr);
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if (ret)
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return ret;
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ret = bgpio_setup_accessors(dev, bgc, flags & BGPIOF_BIG_ENDIAN);
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if (ret)
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return ret;
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ret = bgpio_setup_direction(bgc, dirout, dirin);
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if (ret)
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return ret;
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bgc->data = bgc->read_reg(bgc->reg_dat);
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if (bgc->gc.ops->set == bgpio_set_set && !(flags &
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BGPIOF_UNREADABLE_REG_SET))
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bgc->data = bgc->read_reg(bgc->reg_set);
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if (bgc->reg_dir && !(flags & BGPIOF_UNREADABLE_REG_DIR))
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bgc->dir = bgc->read_reg(bgc->reg_dir);
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return ret;
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}
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void bgpio_remove(struct bgpio_chip *bgc)
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{
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gpiochip_remove(&bgc->gc);
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free(bgc);
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}
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#ifdef CONFIG_GPIO_GENERIC_PLATFORM
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static void __iomem *bgpio_map(struct device_d *dev, const char *name,
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resource_size_t sane_sz, int *err)
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{
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struct resource *r;
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void __iomem *ret;
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*err = 0;
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r = dev_get_resource_by_name(dev, IORESOURCE_MEM, name);
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if (IS_ERR(r))
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return NULL;
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if (resource_size(r) != sane_sz) {
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*err = -EINVAL;
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return NULL;
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}
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ret = request_iomem_region(dev_name(dev), r->start, r->end);
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if (IS_ERR(ret)) {
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*err = PTR_ERR(ret);
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return NULL;
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}
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return ret;
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}
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static int bgpio_dev_probe(struct device_d *dev)
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{
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struct resource *r;
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void __iomem *dat;
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void __iomem *set;
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void __iomem *clr;
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void __iomem *dirout;
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void __iomem *dirin;
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unsigned int sz;
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unsigned long flags = 0;
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int err;
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struct bgpio_chip *bgc;
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struct bgpio_pdata *pdata = dev->platform_data;
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r = dev_get_resource_by_name(dev, IORESOURCE_MEM, "dat");
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if (IS_ERR(r))
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return PTR_ERR(r);
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sz = resource_size(r);
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dat = bgpio_map(dev, "dat", sz, &err);
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if (!dat)
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return err ? err : -EINVAL;
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set = bgpio_map(dev, "set", sz, &err);
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if (err)
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return err;
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clr = bgpio_map(dev, "clr", sz, &err);
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if (err)
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return err;
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dirout = bgpio_map(dev, "dirout", sz, &err);
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if (err)
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return err;
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dirin = bgpio_map(dev, "dirin", sz, &err);
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if (err)
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return err;
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dev_get_drvdata(dev, (const void **)&flags);
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bgc = xzalloc(sizeof(struct bgpio_chip));
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if (!bgc)
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return -ENOMEM;
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err = bgpio_init(bgc, dev, sz, dat, set, clr, dirout, dirin, flags);
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if (err)
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return err;
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if (pdata) {
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bgc->gc.base = pdata->base;
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if (pdata->ngpio > 0)
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bgc->gc.ngpio = pdata->ngpio;
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}
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dev->priv = bgc;
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return gpiochip_add(&bgc->gc);
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}
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static void bgpio_dev_remove(struct device_d *dev)
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{
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struct bgpio_chip *bgc = dev->priv;
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bgpio_remove(bgc);
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}
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static struct platform_device_id bgpio_id_table[] = {
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{
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.name = "basic-mmio-gpio",
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.driver_data = 0,
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},
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{
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.name = "basic-mmio-gpio-be",
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.driver_data = BGPIOF_BIG_ENDIAN,
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},
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{ }
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};
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static struct driver_d bgpio_driver = {
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.name = "basic-mmio-gpio",
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.id_table = bgpio_id_table,
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.probe = bgpio_dev_probe,
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.remove = bgpio_dev_remove,
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};
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static int bgpio_register(void)
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{
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return platform_driver_register(&bgpio_driver);
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}
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coredevice_initcall(bgpio_register);
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#endif
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MODULE_DESCRIPTION("Driver for basic memory-mapped GPIO controllers");
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MODULE_AUTHOR("Anton Vorontsov <cbouatmailru@gmail.com>");
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MODULE_LICENSE("GPL");
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