268 lines
6.0 KiB
C
268 lines
6.0 KiB
C
/*
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* (c) 2012 Sascha Hauer <s.hauer@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <init.h>
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#include <io.h>
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#include <of.h>
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#include <errno.h>
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#include <malloc.h>
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#include <restart.h>
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#include <watchdog.h>
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#include <reset_source.h>
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struct imx_wd;
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struct imx_wd_ops {
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int (*set_timeout)(struct imx_wd *, int);
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int (*init)(struct imx_wd *);
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};
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struct imx_wd {
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struct watchdog wd;
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void __iomem *base;
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struct device_d *dev;
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const struct imx_wd_ops *ops;
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struct restart_handler restart;
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};
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#define to_imx_wd(h) container_of(h, struct imx_wd, wd)
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#define IMX1_WDOG_WCR 0x00 /* Watchdog Control Register */
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#define IMX1_WDOG_WSR 0x04 /* Watchdog Service Register */
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#define IMX1_WDOG_WSTR 0x08 /* Watchdog Status Register */
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#define IMX1_WDOG_WCR_WDE (1 << 0)
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#define IMX1_WDOG_WCR_WHALT (1 << 15)
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#define IMX21_WDOG_WCR 0x00 /* Watchdog Control Register */
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#define IMX21_WDOG_WSR 0x02 /* Watchdog Service Register */
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#define IMX21_WDOG_WSTR 0x04 /* Watchdog Status Register */
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#define IMX21_WDOG_WMCR 0x08 /* Misc Register */
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#define IMX21_WDOG_WCR_WDE (1 << 2)
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#define IMX21_WDOG_WCR_SRS (1 << 4)
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#define IMX21_WDOG_WCR_WDA (1 << 5)
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/* valid for i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 */
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#define WSTR_WARMSTART (1 << 0)
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/* valid for i.MX25, i.MX27, i.MX31, i.MX35, i.MX51 */
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#define WSTR_WDOG (1 << 1)
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/* valid for i.MX27, i.MX31, always '0' on i.MX25, i.MX35, i.MX51 */
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#define WSTR_HARDRESET (1 << 3)
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/* valid for i.MX27, i.MX31, always '0' on i.MX25, i.MX35, i.MX51 */
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#define WSTR_COLDSTART (1 << 4)
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static int imx1_watchdog_set_timeout(struct imx_wd *priv, int timeout)
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{
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u16 val;
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dev_dbg(priv->dev, "%s: %d\n", __func__, timeout);
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if (timeout > 64)
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return -EINVAL;
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if (!timeout) {
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writew(IMX1_WDOG_WCR_WHALT, priv->base + IMX1_WDOG_WCR);
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return 0;
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}
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if (timeout > 0)
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val = (timeout * 2 - 1) << 8;
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else
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val = 0;
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writew(val, priv->base + IMX1_WDOG_WCR);
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writew(IMX1_WDOG_WCR_WDE | val, priv->base + IMX1_WDOG_WCR);
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/* Write Service Sequence */
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writew(0x5555, priv->base + IMX1_WDOG_WSR);
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writew(0xaaaa, priv->base + IMX1_WDOG_WSR);
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return 0;
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}
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static int imx21_watchdog_set_timeout(struct imx_wd *priv, int timeout)
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{
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u16 val;
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dev_dbg(priv->dev, "%s: %d\n", __func__, timeout);
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if (timeout < -1 || timeout > 128)
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return -EINVAL;
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if (timeout == 0) /* bit 2 (WDE) cannot be set to 0 again */
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return -ENOSYS;
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if (timeout > 0)
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val = ((timeout * 2 - 1) << 8) | IMX21_WDOG_WCR_SRS |
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IMX21_WDOG_WCR_WDA;
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else
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val = 0;
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writew(val, priv->base + IMX21_WDOG_WCR);
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writew(IMX21_WDOG_WCR_WDE | val, priv->base + IMX21_WDOG_WCR);
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/* Write Service Sequence */
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writew(0x5555, priv->base + IMX21_WDOG_WSR);
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writew(0xaaaa, priv->base + IMX21_WDOG_WSR);
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return 0;
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}
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static int imx_watchdog_set_timeout(struct watchdog *wd, unsigned timeout)
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{
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struct imx_wd *priv = (struct imx_wd *)to_imx_wd(wd);
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return priv->ops->set_timeout(priv, timeout);
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}
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static void __noreturn imxwd_force_soc_reset(struct restart_handler *rst)
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{
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struct imx_wd *priv = container_of(rst, struct imx_wd, restart);
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priv->ops->set_timeout(priv, -1);
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mdelay(1000);
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hang();
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}
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static void imx_watchdog_detect_reset_source(struct imx_wd *priv)
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{
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u16 val = readw(priv->base + IMX21_WDOG_WSTR);
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if (val & WSTR_COLDSTART) {
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reset_source_set(RESET_POR);
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return;
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}
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if (val & (WSTR_HARDRESET | WSTR_WARMSTART)) {
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reset_source_set(RESET_RST);
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return;
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}
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if (val & WSTR_WDOG) {
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reset_source_set(RESET_WDG);
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return;
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}
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/* else keep the default 'unknown' state */
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}
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static int imx21_wd_init(struct imx_wd *priv)
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{
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imx_watchdog_detect_reset_source(priv);
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/*
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* Disable watchdog powerdown counter
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*/
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writew(0x0, priv->base + IMX21_WDOG_WMCR);
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return 0;
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}
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static int imx_wd_probe(struct device_d *dev)
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{
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struct resource *iores;
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struct imx_wd *priv;
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void *ops;
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int ret;
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ret = dev_get_drvdata(dev, (const void **)&ops);
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if (ret)
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return ret;
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priv = xzalloc(sizeof(struct imx_wd));
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iores = dev_request_mem_resource(dev, 0);
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if (IS_ERR(iores)) {
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dev_err(dev, "could not get memory region\n");
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return PTR_ERR(iores);
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}
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priv->base = IOMEM(iores->start);
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priv->ops = ops;
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priv->wd.set_timeout = imx_watchdog_set_timeout;
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priv->wd.dev = dev;
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priv->dev = dev;
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if (IS_ENABLED(CONFIG_WATCHDOG_IMX)) {
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ret = watchdog_register(&priv->wd);
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if (ret)
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goto on_error;
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}
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if (priv->ops->init) {
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ret = priv->ops->init(priv);
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if (ret) {
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dev_err(dev, "Failed to init watchdog device %d\n", ret);
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goto error_unregister;
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}
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}
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dev->priv = priv;
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priv->restart.name = "imxwd";
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priv->restart.restart = imxwd_force_soc_reset;
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restart_handler_register(&priv->restart);
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return 0;
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error_unregister:
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if (IS_ENABLED(CONFIG_WATCHDOG_IMX))
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watchdog_deregister(&priv->wd);
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on_error:
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free(priv);
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return ret;
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}
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static const struct imx_wd_ops imx21_wd_ops = {
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.set_timeout = imx21_watchdog_set_timeout,
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.init = imx21_wd_init,
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};
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static const struct imx_wd_ops imx1_wd_ops = {
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.set_timeout = imx1_watchdog_set_timeout,
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};
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static __maybe_unused struct of_device_id imx_wdt_dt_ids[] = {
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{
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.compatible = "fsl,imx1-wdt",
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.data = &imx1_wd_ops,
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}, {
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.compatible = "fsl,imx21-wdt",
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.data = &imx21_wd_ops,
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}, {
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/* sentinel */
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}
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};
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static struct platform_device_id imx_wdt_ids[] = {
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{
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.name = "imx1-wdt",
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.driver_data = (unsigned long)&imx1_wd_ops,
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}, {
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.name = "imx21-wdt",
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.driver_data = (unsigned long)&imx21_wd_ops,
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}, {
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/* sentinel */
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},
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};
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static struct driver_d imx_wd_driver = {
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.name = "imx-watchdog",
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.probe = imx_wd_probe,
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.of_compatible = DRV_OF_COMPAT(imx_wdt_dt_ids),
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.id_table = imx_wdt_ids,
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};
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device_platform_driver(imx_wd_driver);
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