191 lines
6.0 KiB
C
191 lines
6.0 KiB
C
/*
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* Copyright (C) 2009 Marc Kleine-Budde <mkl@pengutronix.de>
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*
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* This file is released under the GPLv2
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*
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* Derived from:
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* - arch-mxc/pmic_external.h -- contains interface of the PMIC protocol driver
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* Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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*/
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#ifndef __MFD_MC13XXX_H
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#define __MFD_MC13XXX_H
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#include <linux/types.h>
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#define MC13XXX_REG_IDENTIFICATION 0x07
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#define MC13783_REG_INT_STATUS0 0x00
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#define MC13783_REG_INT_MASK0 0x01
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#define MC13783_REG_INT_SENSE0 0x02
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#define MC13783_REG_INT_STATUS1 0x03
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#define MC13783_REG_INT_MASK1 0x04
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#define MC13783_REG_INT_SENSE1 0x05
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#define MC13783_REG_PU_MODE_S 0x06
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#define MC13783_REG_SEMAPHORE 0x08
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#define MC13783_REG_ARB_PER_AUDIO 0x09
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#define MC13783_REG_ARB_SWITCHERS 0x0a
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#define MC13783_REG_ARB_REGULATORS(x) (0x0b + (x)) /* 0 .. 1 */
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#define MC13783_REG_POWER_CONTROL(x) (0x0d + (x)) /* 0 .. 2 */
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#define MC13783_REG_REGEN_ASSIGNMENT 0x10
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#define MC13783_REG_CONTROL_SPARE 0x11
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#define MC13783_REG_MEMORY_A 0x12
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#define MC13783_REG_MEMORY_B 0x13
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#define MC13783_REG_RTC_TIME 0x14
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#define MC13783_REG_RTC_ALARM 0x15
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#define MC13783_REG_RTC_DAY 0x16
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#define MC13783_REG_RTC_DAY_ALARM 0x17
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#define MC13783_REG_SWITCHERS(x) (0x18 + (x)) /* 0 .. 5 */
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#define MC13783_REG_REG_SETTING(x) (0x1e + (x)) /* 0 .. 1 */
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#define MC13783_REG_REG_MODE(x) (0x20 + (x)) /* 0 .. 1 */
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#define MC13783_REG_POWER_MISC 0x22
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#define MC13783_REG_POWER_SPARE 0x23
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#define MC13783_REG_AUDIO_RX_0 0x24
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#define MC13783_REG_AUDIO_RX_1 0x25
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#define MC13783_REG_AUDIO_TX 0x26
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#define MC13783_REG_AUDIO_SSI_NETWORK 0x27
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#define MC13783_REG_AUDIO_CODEC 0x28
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#define MC13783_REG_AUDIO_STEREO_DAC 0x29
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#define MC13783_REG_AUDIO_SPARE 0x2a
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#define MC13783_REG_ADC(x) (0x2b + (x)) /* 0 .. 4 */
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#define MC13783_REG_CHARGER 0x30
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#define MC13783_REG_USB 0x31
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#define MC13783_REG_CHARGE_USB_SPARE 0x32
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#define MC13783_REG_LED_CONTROL(x) (0x33 + (x)) /* 0 .. 5 */
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#define MC13783_REG_SPARE 0x39
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#define MC13783_REG_TRIM(x) (0x3a + (x)) /* 0 .. 1 */
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#define MC13783_REG_TEST(x) (0x3c + (x)) /* 0 .. 3 */
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#define MC13892_REG_INT_STATUS0 0x00
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#define MC13892_REG_INT_MASK0 0x01
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#define MC13892_REG_INT_SENSE0 0x02
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#define MC13892_REG_INT_STATUS1 0x03
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#define MC13892_REG_INT_MASK1 0x04
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#define MC13892_REG_INT_SENSE1 0x05
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#define MC13892_REG_PU_MODE_S 0x06
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#define MC13892_REG_UNUSED0 0x08
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#define MC13892_REG_ACC0 0x09
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#define MC13892_REG_ACC1 0x0a
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#define MC13892_REG_UNUSED1 0x0b
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#define MC13892_REG_UNUSED2 0x0c
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#define MC13892_REG_POWER_CTL0 0x0d
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#define MC13892_REG_POWER_CTL1 0x0e
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#define MC13892_REG_POWER_CTL2 0x0f
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#define MC13892_REG_REGEN_ASSIGN 0x10
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#define MC13892_REG_UNUSED3 0x11
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#define MC13892_REG_MEM_A 0x12
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#define MC13892_REG_MEM_B 0x13
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#define MC13892_REG_RTC_TIME 0x14
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#define MC13892_REG_RTC_ALARM 0x15
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#define MC13892_REG_RTC_DAY 0x16
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#define MC13892_REG_RTC_DAY_ALARM 0x17
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#define MC13892_REG_SW_0 0x18
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#define MC13892_REG_SW_1 0x19
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#define MC13892_REG_SW_2 0x1a
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#define MC13892_REG_SW_3 0x1b
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#define MC13892_REG_SW_4 0x1c
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#define MC13892_REG_SW_5 0x1d
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#define MC13892_REG_SETTING_0 0x1e
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#define MC13892_REG_SETTING_1 0x1f
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#define MC13892_REG_MODE_0 0x20
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#define MC13892_REG_MODE_1 0x21
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#define MC13892_REG_POWER_MISC 0x22
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#define MC13892_REG_UNUSED4 0x23
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#define MC13892_REG_UNUSED5 0x24
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#define MC13892_REG_UNUSED6 0x25
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#define MC13892_REG_UNUSED7 0x26
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#define MC13892_REG_UNUSED8 0x27
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#define MC13892_REG_UNUSED9 0x28
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#define MC13892_REG_UNUSED10 0x29
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#define MC13892_REG_UNUSED11 0x2a
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#define MC13892_REG_ADC0 0x2b
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#define MC13892_REG_ADC1 0x2c
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#define MC13892_REG_ADC2 0x2d
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#define MC13892_REG_ADC3 0x2e
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#define MC13892_REG_ADC4 0x2f
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#define MC13892_REG_CHARGE 0x30
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#define MC13892_REG_USB0 0x31
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#define MC13892_REG_USB1 0x32
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#define MC13892_REG_LED_CTL0 0x33
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#define MC13892_REG_LED_CTL1 0x34
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#define MC13892_REG_LED_CTL2 0x35
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#define MC13892_REG_LED_CTL3 0x36
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#define MC13892_REG_UNUSED12 0x37
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#define MC13892_REG_UNUSED13 0x38
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#define MC13892_REG_TRIM0 0x39
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#define MC13892_REG_TRIM1 0x3a
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#define MC13892_REG_TEST0 0x3b
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#define MC13892_REG_TEST1 0x3c
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#define MC13892_REG_TEST2 0x3d
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#define MC13892_REG_TEST3 0x3e
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#define MC13892_REG_TEST4 0x3f
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#define MC13892_REVISION_1_0 0
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#define MC13892_REVISION_1_1 1
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#define MC13892_REVISION_1_2 2
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#define MC13892_REVISION_2_0 3
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#define MC13892_REVISION_2_0a 4
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#define MC13892_REVISION_2_1 5
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#define MC13892_REVISION_3_0 6
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#define MC13892_REVISION_3_1 7
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#define MC13892_REVISION_3_2 8
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#define MC13892_REVISION_3_2a 9
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#define MC13892_REVISION_3_3 10
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#define MC13892_REVISION_3_5 11
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#define MC13783_SWX_VOLTAGE(x) ((x) & 0x3f)
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#define MC13783_SWX_VOLTAGE_DVS(x) (((x) & 0x3f) << 6)
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#define MC13783_SWX_VOLTAGE_STANDBY(x) (((x) & 0x3f) << 12)
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#define MC13783_SWX_VOLTAGE_1_450 0x16
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#define MC13783_SWX_MODE_OFF 0
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#define MC13783_SWX_MODE_NO_PULSE_SKIP 1
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#define MC13783_SWX_MODE_PULSE_SKIP 2
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#define MC13783_SWX_MODE_LOW_POWER_PFM 3
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#define MC13783_SW1A_MODE(x) (((x) & 0x3) << 0)
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#define MC13783_SW1A_MODE_STANDBY(x) (((x) & 0x3) << 2)
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#define MC13783_SW1B_MODE(x) (((x) & 0x3) << 10)
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#define MC13783_SW1B_MODE_STANDBY(x) (((x) & 0x3) << 12)
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#define MC13783_SW1A_SOFTSTART (1 << 9)
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#define MC13783_SW1B_SOFTSTART (1 << 17)
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#define MC13783_SW_PLL_FACTOR(x) (((x) - 28) << 19)
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struct mc13xxx;
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#ifdef CONFIG_MFD_MC13XXX
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extern struct mc13xxx *mc13xxx_get(void);
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extern int mc13xxx_revision(struct mc13xxx *mc13xxx);
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extern int mc13xxx_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val);
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extern int mc13xxx_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val);
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extern int mc13xxx_set_bits(struct mc13xxx *mc13xxx, u8 reg, u32 mask, u32 val);
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#else
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static inline struct mc13xxx *mc13xxx_get(void)
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{
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return NULL;
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}
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static inline int mc13xxx_revision(struct mc13xxx *mc13xxx)
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{
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return -ENODEV;
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}
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static inline int mc13xxx_reg_read(struct mc13xxx *mc13xxx, u8 reg, u32 *val)
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{
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return -ENODEV;
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}
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static inline int mc13xxx_reg_write(struct mc13xxx *mc13xxx, u8 reg, u32 val)
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{
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return -ENODEV;
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}
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static inline int mc13xxx_set_bits(struct mc13xxx *mc13xxx, u8 reg, u32 mask, u32 val)
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{
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return -ENODEV;
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}
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#endif
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#endif /* __MFD_MC13XXX_H */
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