133 lines
4.1 KiB
C
133 lines
4.1 KiB
C
/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <mach/imx27-regs.h>
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#include <mach/weim.h>
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#include <mach/iomux-v1.h>
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#include <sizes.h>
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#include <mach/revision.h>
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#include <mach/generic.h>
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#include <init.h>
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#include <io.h>
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#include <mach/generic.h>
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static int imx27_silicon_revision(void)
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{
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uint32_t val;
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int rev;
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val = readl(MX27_SYSCTRL_BASE_ADDR);
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switch (val >> 28) {
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case 0:
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rev = IMX_CHIP_REV_1_0;
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break;
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case 1:
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rev = IMX_CHIP_REV_2_0;
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break;
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case 2:
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rev = IMX_CHIP_REV_2_1;
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break;
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default:
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rev = IMX_CHIP_REV_UNKNOWN;
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break;
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}
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imx_set_silicon_revision("i.MX27", rev);
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return 0;
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}
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void imx27_setup_weimcs(size_t cs, unsigned upper, unsigned lower,
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unsigned additional)
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{
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writel(upper, MX27_WEIM_BASE_ADDR + (cs * 0x10) + 0x0);
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writel(lower, MX27_WEIM_BASE_ADDR + (cs * 0x10) + 0x4);
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writel(additional, MX27_WEIM_BASE_ADDR + (cs * 0x10) + 0x8);
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}
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/*
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* Initialize MAX on i.MX27. necessary to give the DMA engine
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* higher priority to the memory than the CPU. Needed for proper
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* audio support
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*/
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#define MAX_SLAVE_MPR_OFFSET 0x0 /* Master Priority register */
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#define MAX_SLAVE_AMPR_OFFSET 0x4 /* Alternate Master Priority register */
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#define MAX_SLAVE_PORT0_OFFSET 0x0
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#define MAX_SLAVE_PORT1_OFFSET 0x100
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#define MAX_SLAVE_PORT2_OFFSET 0x200
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#define MAX_MASTER_PRIO(master, prio) (((prio) << (master) * 4))
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#define MASTER_IAHB 0
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#define MASTER_DAHB 1
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#define MASTER_EMMA 2
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#define MASTER_DMA 3
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#define MASTER_SLDC 4
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#define MASTER_CODEC 5
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static void imx27_init_max(void)
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{
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void __iomem *max_base = (void *)MX27_MAX_BASE_ADDR;
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u32 val;
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/* 0 is the highest priority */
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val = MAX_MASTER_PRIO(MASTER_IAHB, 5) |
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MAX_MASTER_PRIO(MASTER_DAHB, 4) |
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MAX_MASTER_PRIO(MASTER_EMMA, 1) |
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MAX_MASTER_PRIO(MASTER_DMA, 2) |
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MAX_MASTER_PRIO(MASTER_SLDC, 0) |
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MAX_MASTER_PRIO(MASTER_CODEC, 3);
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writel(val, max_base + MAX_SLAVE_PORT0_OFFSET + MAX_SLAVE_MPR_OFFSET);
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writel(val, max_base + MAX_SLAVE_PORT1_OFFSET + MAX_SLAVE_MPR_OFFSET);
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writel(val, max_base + MAX_SLAVE_PORT2_OFFSET + MAX_SLAVE_MPR_OFFSET);
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writel(val, max_base + MAX_SLAVE_PORT0_OFFSET + MAX_SLAVE_AMPR_OFFSET);
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writel(val, max_base + MAX_SLAVE_PORT1_OFFSET + MAX_SLAVE_AMPR_OFFSET);
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writel(val, max_base + MAX_SLAVE_PORT2_OFFSET + MAX_SLAVE_AMPR_OFFSET);
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}
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int imx27_init(void)
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{
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imx27_silicon_revision();
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imx27_boot_save_loc((void *)MX27_SYSCTRL_BASE_ADDR);
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add_generic_device("imx27-esdctl", DEVICE_ID_SINGLE, NULL,
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MX27_ESDCTL_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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return 0;
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}
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int imx27_devices_init(void)
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{
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imx_iomuxv1_init((void *)MX27_GPIO1_BASE_ADDR);
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add_generic_device("imx_iim", DEVICE_ID_SINGLE, NULL,
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MX27_IIM_BASE_ADDR, SZ_4K, IORESOURCE_MEM, NULL);
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imx27_init_max();
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add_generic_device("imx27-ccm", DEVICE_ID_SINGLE, NULL,
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MX27_CCM_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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add_generic_device("imx1-gpt", 0, NULL, MX27_GPT1_BASE_ADDR, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx1-gpio", 0, NULL, MX27_GPIO1_BASE_ADDR, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx1-gpio", 1, NULL, MX27_GPIO2_BASE_ADDR, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx1-gpio", 2, NULL, MX27_GPIO3_BASE_ADDR, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx1-gpio", 3, NULL, MX27_GPIO4_BASE_ADDR, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx1-gpio", 4, NULL, MX27_GPIO5_BASE_ADDR, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx1-gpio", 5, NULL, MX27_GPIO6_BASE_ADDR, 0x100, IORESOURCE_MEM, NULL);
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add_generic_device("imx21-wdt", 0, NULL, MX27_WDOG_BASE_ADDR, 0x1000, IORESOURCE_MEM, NULL);
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add_generic_device("imx27-usb-misc", 0, NULL, MX27_USB_OTG_BASE_ADDR + 0x600, 0x100, IORESOURCE_MEM, NULL);
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return 0;
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}
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