158 lines
3.6 KiB
C
158 lines
3.6 KiB
C
/*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <config.h>
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#include <common.h>
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#include <init.h>
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#include <clock.h>
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#include <io.h>
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#include <mach/s3c-iomap.h>
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#include <mach/s3c-generic.h>
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#include <mach/s3c-clocks.h>
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#include <mach/s3c-busctl.h>
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/**
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* Calculate the current M-PLL clock.
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* @return Current frequency in Hz
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*/
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uint32_t s3c_get_mpllclk(void)
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{
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uint32_t m, p, s, reg_val;
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reg_val = readl(S3C_MPLLCON);
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m = ((reg_val & 0xFF000) >> 12) + 8;
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p = ((reg_val & 0x003F0) >> 4) + 2;
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s = reg_val & 0x3;
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#ifdef CONFIG_CPU_S3C2410
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return (S3C24XX_CLOCK_REFERENCE * m) / (p << s);
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#endif
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#ifdef CONFIG_CPU_S3C2440
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return 2 * m * (S3C24XX_CLOCK_REFERENCE / (p << s));
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#endif
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}
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/**
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* Calculate the current U-PLL clock
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* @return Current frequency in Hz
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*/
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uint32_t s3c_get_upllclk(void)
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{
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uint32_t m, p, s, reg_val;
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reg_val = readl(S3C_UPLLCON);
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m = ((reg_val & 0xFF000) >> 12) + 8;
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p = ((reg_val & 0x003F0) >> 4) + 2;
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s = reg_val & 0x3;
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return (S3C24XX_CLOCK_REFERENCE * m) / (p << s);
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}
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/**
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* Calculate the FCLK frequency used for the ARM CPU core
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* @return Current frequency in Hz
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*/
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uint32_t s3c_get_fclk(void)
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{
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return s3c_get_mpllclk();
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}
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/**
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* Calculate the HCLK frequency used for the AHB bus (CPU to main peripheral)
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* @return Current frequency in Hz
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*/
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uint32_t s3c_get_hclk(void)
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{
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uint32_t f_clk;
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f_clk = s3c_get_fclk();
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#ifdef CONFIG_CPU_S3C2410
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if (readl(S3C_CLKDIVN) & 0x02)
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return f_clk >> 1;
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#endif
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#ifdef CONFIG_CPU_S3C2440
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switch(readl(S3C_CLKDIVN) & 0x06) {
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case 2:
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return f_clk >> 1;
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case 4:
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return f_clk >> 2; /* TODO consider CAMDIVN */
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case 6:
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return f_clk / 3; /* TODO consider CAMDIVN */
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}
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#endif
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return f_clk;
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}
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/**
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* Calculate the PCLK frequency used for the slower peripherals
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* @return Current frequency in Hz
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*/
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uint32_t s3c_get_pclk(void)
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{
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uint32_t p_clk;
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p_clk = s3c_get_hclk();
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if (readl(S3C_CLKDIVN) & 0x01)
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return p_clk >> 1;
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return p_clk;
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}
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/**
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* Calculate the UCLK frequency used by the USB host device
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* @return Current frequency in Hz
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*/
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uint32_t s3c24_get_uclk(void)
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{
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return s3c_get_upllclk();
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}
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/**
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* Return correct UART frequency based on the UCON register
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*/
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unsigned s3c_get_uart_clk(unsigned src)
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{
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switch (src & 3) {
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case 0:
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case 2:
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return s3c_get_pclk();
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case 1:
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return 0; /* TODO UEXTCLK */
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case 3:
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return 0; /* TODO FCLK/n */
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}
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return 0; /* not reached, to make compiler happy */
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}
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/**
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* Show the user the current clock settings
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*/
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int s3c24xx_dump_clocks(void)
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{
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printf("refclk: %7d kHz\n", S3C24XX_CLOCK_REFERENCE / 1000);
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printf("mpll: %7d kHz\n", s3c_get_mpllclk() / 1000);
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printf("upll: %7d kHz\n", s3c_get_upllclk() / 1000);
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printf("fclk: %7d kHz\n", s3c_get_fclk() / 1000);
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printf("hclk: %7d kHz\n", s3c_get_hclk() / 1000);
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printf("pclk: %7d kHz\n", s3c_get_pclk() / 1000);
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printf("SDRAM1: CL%d@%dMHz\n", ((readl(S3C_BANKCON6) & 0xc) >> 2) + 2,
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s3c_get_hclk() / 1000000);
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if ((readl(S3C_BANKCON7) & (0x3 << 15)) == (0x3 << 15))
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printf("SDRAM2: CL%d@%dMHz\n",
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((readl(S3C_BANKCON7) & 0xc) >> 2) + 2,
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s3c_get_hclk() / 1000000);
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return 0;
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}
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late_initcall(s3c24xx_dump_clocks);
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