87 lines
1.9 KiB
C
87 lines
1.9 KiB
C
/*
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* Copyright (C) 2009 Jean-Christophe PLAGNIOL-VILLARD <plagnio@jcrosoft.com>
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*
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* GPLv2 only
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*/
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#include <common.h>
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#include <init.h>
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#include <io.h>
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#include <linux/clk.h>
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#include <linux/clkdev.h>
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#include <linux/amba/bus.h>
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#include <asm/hardware/arm_timer.h>
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#include <asm/hardware/sp810.h>
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#include <mach/devices.h>
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void __iomem *v2m_sysreg_base;
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static const char *v2m_osc2_periphs[] = {
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"mb:mmci", "mmci-pl18x", /* PL180 MMCI */
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"mb:uart0", "uart-pl0110", /* PL011 UART0 */
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"mb:uart1", "uart-pl0111", /* PL011 UART1 */
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"mb:uart2", "uart-pl0112", /* PL011 UART2 */
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"mb:uart3", "uart-pl0113", /* PL011 UART3 */
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};
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static void v2m_clk_init(void)
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{
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struct clk *clk;
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int i;
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clk = clk_fixed("dummy_apb_pclk", 0);
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clk_register_clkdev(clk, "apb_pclk", NULL);
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clk = clk_fixed("mb:sp804_clk", 1000000);
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clk_register_clkdev(clk, NULL, "sp804");
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clk = clk_fixed("mb:osc2", 24000000);
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for (i = 0; i < ARRAY_SIZE(v2m_osc2_periphs); i++)
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clk_register_clkdev(clk, NULL, v2m_osc2_periphs[i]);
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}
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static void v2m_sysctl_init(void __iomem *base)
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{
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u32 scctrl;
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if (WARN_ON(!base))
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return;
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/* Select 1MHz TIMCLK as the reference clock for SP804 timers */
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scctrl = readl(base + SCCTRL);
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scctrl |= SCCTRL_TIMEREN0SEL_TIMCLK;
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scctrl |= SCCTRL_TIMEREN1SEL_TIMCLK;
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writel(scctrl, base + SCCTRL);
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}
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static void __init v2m_sp804_init(void __iomem *base)
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{
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writel(0, base + TIMER_1_BASE + TIMER_CTRL);
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amba_apb_device_add(NULL, "sp804", DEVICE_ID_SINGLE, (resource_size_t)base, 4096, NULL, 0);
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}
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void vexpress_a9_legacy_init(void)
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{
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v2m_wdt_base = IOMEM(0x1000f000);
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v2m_sysreg_base = IOMEM(0x10001000);
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v2m_sysctl_init(IOMEM(0x10001000));
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v2m_clk_init();
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v2m_sp804_init(IOMEM(0x10011000));
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}
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void vexpress_init(void)
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{
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v2m_wdt_base = IOMEM(0x1c0f0000);
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v2m_sysreg_base = IOMEM(0x1c020000);
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v2m_sysctl_init(IOMEM(0x1c020000));
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v2m_clk_init();
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v2m_sp804_init(IOMEM(0x1c110000));
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}
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