171 lines
4.1 KiB
C
171 lines
4.1 KiB
C
/*
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* Copyright (C) 2011 Michael Grzeschik <mgr@pengutronix.de>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <common.h>
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#include <net.h>
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#include <mci.h>
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#include <init.h>
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#include <environment.h>
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#include <fec.h>
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#include <asm/armlinux.h>
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#include <generated/mach-types.h>
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#include <partition.h>
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#include <fs.h>
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#include <fcntl.h>
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#include <asm/io.h>
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#include <mach/hardware.h>
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#include <nand.h>
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#include <linux/mtd/nand.h>
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#include <mach/board.h>
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#include <mach/at91sam9_smc.h>
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#include <gpio.h>
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#include <mach/io.h>
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#include <mach/iomux.h>
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#include <mach/at91_rstc.h>
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#include <linux/clk.h>
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static struct atmel_nand_data nand_pdata = {
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.ale = 21,
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.cle = 22,
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.det_pin = -EINVAL,
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.ecc_mode = NAND_ECC_HW,
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.rdy_pin = AT91_PIN_PC13,
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.enable_pin = AT91_PIN_PC14,
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.bus_width_16 = 1,
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};
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static struct sam9_smc_config dss11_nand_smc_config = {
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.ncs_read_setup = 0,
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.nrd_setup = 1,
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.ncs_write_setup = 0,
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.nwe_setup = 1,
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.ncs_read_pulse = 3,
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.nrd_pulse = 3,
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.ncs_write_pulse = 3,
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.nwe_pulse = 3,
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.read_cycle = 5,
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.write_cycle = 5,
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.mode = AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE,
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.tdf_cycles = 2,
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};
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static void dss11_add_device_nand(void)
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{
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/* setup bus-width (16) */
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dss11_nand_smc_config.mode |= AT91_SMC_DBW_16;
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/* configure chip-select 3 (NAND) */
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sam9_smc_configure(0, 3, &dss11_nand_smc_config);
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at91_add_device_nand(&nand_pdata);
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}
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static struct macb_platform_data macb_pdata = {
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.phy_addr = 0,
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.flags = AT91SAM_ETX2_ETX3_ALTERNATIVE,
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};
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static void dss11_phy_reset(void)
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{
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unsigned long rstc;
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struct clk *clk = clk_get(NULL, "macb_clk");
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clk_enable(clk);
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at91_set_gpio_input(AT91_PIN_PA14, 0);
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at91_set_gpio_input(AT91_PIN_PA15, 0);
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at91_set_gpio_input(AT91_PIN_PA17, 0);
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at91_set_gpio_input(AT91_PIN_PA25, 0);
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at91_set_gpio_input(AT91_PIN_PA26, 0);
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at91_set_gpio_input(AT91_PIN_PA28, 0);
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rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
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/* Need to reset PHY -> 500ms reset */
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at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
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(AT91_RSTC_ERSTL & (0x0d << 8)) |
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AT91_RSTC_URSTEN);
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at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
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/* Wait for end hardware reset */
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while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
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/* Restore NRST value */
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at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
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(rstc) |
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AT91_RSTC_URSTEN);
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}
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static struct atmel_mci_platform_data dss11_mci_data = {
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.slot_b = 1,
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.bus_width = 4,
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.detect_pin = -EINVAL,
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.wp_pin = -EINVAL,
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};
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static struct at91_usbh_data dss11_usbh_data = {
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.ports = 2,
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.vbus_pin = { -EINVAL, -EINVAL },
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};
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static int dss11_mem_init(void)
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{
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at91_add_device_sdram(64 * 1024 * 1024);
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return 0;
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}
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mem_initcall(dss11_mem_init);
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static int dss11_devices_init(void)
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{
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dss11_add_device_nand();
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dss11_phy_reset();
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at91_add_device_eth(0, &macb_pdata);
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at91_add_device_mci(0, &dss11_mci_data);
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at91_add_device_usbh_ohci(&dss11_usbh_data);
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armlinux_set_architecture(MACH_TYPE_DSS11);
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devfs_add_partition("nand0", 0x00000, 0x20000, DEVFS_PARTITION_FIXED, "bootstrap");
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dev_add_bb_dev("bootstrap", "bootstrap.bb");
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devfs_add_partition("nand0", 0x20000, 0x40000, DEVFS_PARTITION_FIXED, "barebox");
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dev_add_bb_dev("barebox", "barebox.bb");
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devfs_add_partition("nand0", 0x60000, 0x40000, DEVFS_PARTITION_FIXED, "barebox-env");
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dev_add_bb_dev("barebox-env", "env0");
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return 0;
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}
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device_initcall(dss11_devices_init);
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static int dss11_console_init(void)
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{
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barebox_set_model("Aizo dSS11");
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barebox_set_hostname("dss11");
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at91_register_uart(0, 0);
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return 0;
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}
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console_initcall(dss11_console_init);
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static int dss11_main_clock(void)
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{
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at91_set_main_clock(18432000);
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return 0;
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}
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pure_initcall(dss11_main_clock);
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