f369f64ed1
This patch is based on ARM pbl support and allows creating a pre-bootloader binary for compressed image. For different MIPS SoCs (or even for different boards based on the same SoC) the operations carried on in start-pbl.S can be very different. The additional constraints can be imposed on the size of the boot code or the special magic labels in the beginning of the boot code; In some cases it could be necessary to show CPU is alive as early as possible (transmit a char via UART or blink a LED). So the demands for pbl start operation can be very different. E.g. malta board store boot code at the NOR flash mapped to the MIPS power-on address (0xbfc00000); it is the most simple case: we need just copy pbl image from direct-mapped flash to RAM and jump there. The XBurst-powered boards store boot code in the beginning of a NAND flash or in the beginning of SD/MMC card. In this case we must use simple and short NAND or SD/MMC access routines to copy pbl image to RAM. To meet so different demands a simple technique is selected: * MIPS pbl entry point located in file arch/mips/boot/start-pbl.S. * MIPS pbl code (see start-pbl.S) assumes that every pbl-enabled board has a arch/mips/boards/<BOARD>/include/board/board_pbl_start.h header file. This file must contain definition of the board_pbl_start macro. This macro is used as start of pbl image; * the most popular asm routines (stack setup, relocation to link address, NS16550 initialization (WIP) and so on) are containt in the arch/mips/include/asm/pbl_macros.h header file. So board pbl macro can use it if necessary. It is possible to create similar headers with macros for each specific SoC; so even if we have many different boards based on the same SoC the board_pbl_start macro for every board can be short and clear. * after board-specific initialization the stack pointer is initialized and pbl C code is started. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
47 lines
1 KiB
ArmAsm
47 lines
1 KiB
ArmAsm
/*
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* Startup Code for MIPS CPU
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*
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* Copyright (C) 2011, 2012 Antony Pavlov <antonynpavlov@gmail.com>
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* ADR macro copyrighted (C) 2009 by Shinya Kuribayashi <skuribay@pobox.com>
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*
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* This file is part of barebox.
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* See file CREDITS for list of people who contributed to this project.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <asm/regdef.h>
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#include <asm/mipsregs.h>
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#include <asm/asm.h>
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#include <asm/pbl_macros.h>
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#include <board/board_pbl_start.h>
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.set noreorder
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.text
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.section ".text_head_entry"
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.align 4
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EXPORT(pbl_start)
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board_pbl_start
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stack_setup
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la v0, pbl_main_entry
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jal v0
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nop
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/* No return */
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__error:
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b __error
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nop
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