cad14480bf
Often enough the exception vectors are not on TEXT_BASE (for example on i.MX SoCs in internal boot mode), so the board specific code did not map the exception vectors to 0x0 but whatever happens to be on TEXT_BASE. Also, the current section-only mapping requires the exception vectors to be on a 1MB boundary. Instead, create the possibility to create second level tables and use this to map a copy of the exception vectors in a board independent way. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> |
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.. | ||
Kconfig | ||
Makefile | ||
cache-armv4.S | ||
cache-armv5.S | ||
cache-armv6.S | ||
cache-armv7.S | ||
cache-l2x0.c | ||
cpu.c | ||
cpuinfo.c | ||
exceptions.S | ||
interrupts.c | ||
mmu.c | ||
start.c |