94 lines
2.3 KiB
C
94 lines
2.3 KiB
C
/*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Marius Groeger <mgroeger@sysgo.de>
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*
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* (C) Copyright 2002
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* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
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* Alex Zuepke <azu@sysgo.de>
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*
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* (C) Copyright 2002
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* Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <common.h>
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#include <init.h>
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#include <clock.h>
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#include <mach/hardware.h>
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#include <mach/at91_tc.h>
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#include <mach/at91_st.h>
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#include <mach/at91_pmc.h>
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#include <mach/io.h>
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#include <io.h>
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/*
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* The ST_CRTR is updated asynchronously to the master clock ... but
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* the updates as seen by the CPU don't seem to be strictly monotonic.
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* Waiting until we read the same value twice avoids glitching.
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*/
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uint64_t at91rm9200_clocksource_read(void)
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{
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unsigned long x1, x2;
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x1 = at91_sys_read(AT91_ST_CRTR);
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do {
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x2 = at91_sys_read(AT91_ST_CRTR);
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if (x1 == x2)
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break;
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x1 = x2;
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} while (1);
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return x1;
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}
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static struct clocksource cs = {
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.mask = CLOCKSOURCE_MASK(20),
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.read = at91rm9200_clocksource_read,
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.shift = 10,
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};
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static int clocksource_init (void)
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{
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/* The 32KiHz "Slow Clock" (tick every 30517.58 nanoseconds) is used
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* directly for the clocksource and all clockevents, after adjusting
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* its prescaler from the 1 Hz default.
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*/
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at91_sys_write(AT91_ST_RTMR, 1);
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cs.mult = clocksource_hz2mult(AT91_SLOW_CLOCK, cs.shift);
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init_clock(&cs);
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return 0;
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}
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core_initcall(clocksource_init);
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/*
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* Reset the cpu through the reset controller
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*/
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void __noreturn reset_cpu (unsigned long ignored)
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{
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/*
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* Perform a hardware reset with the use of the Watchdog timer.
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*/
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at91_sys_write(AT91_ST_WDMR, AT91_ST_RSTEN | AT91_ST_EXTEN | 1);
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at91_sys_write(AT91_ST_CR, AT91_ST_WDRST);
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/* Not reached */
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while (1);
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}
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EXPORT_SYMBOL(reset_cpu);
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