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barebox/arch/mips/mach-malta/include/mach
Antony Pavlov 93f1811d8b MIPS: qemu-malta: add CBUS UART support
This patch adds CBUS UART dts support;
also it adds the necessary macros for DEBUG_LL.

qemu-malta supports three serial interfaces:

  * two ports are provided by the FDC37M817
    Super I/O; this chip is connected via LPC bus
    to Intel 82371EB (PIIX4E) South Bridge;

  * the third serial port is provided by
    the discrete TI 16C550C (CBUS UART);
    this chip is connected via CBUS directly
    to the board's GT64120 North Bridge.

See Malta User's Manual (MD00048) for details.

CBUS UART Instructions for use:

  1. Enable CONFIG_CONSOLE_ACTIVATE_ALL in .config
     (or disable uart0 in dts) and compile barebox;

  2. run qemu:

     qemu-system-mips -nographic -nodefaults \
        -monitor null -M malta -m 256 \
        -serial null -serial null -serial stdio \
        -bios barebox-flash-image

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2014-04-03 07:55:16 +02:00
..
debug_ll.h MIPS: qemu-malta: rework debug_ll.h 2013-06-25 21:36:04 +02:00
hardware.h MIPS: qemu-malta: add CBUS UART support 2014-04-03 07:55:16 +02:00
mach-gt64120.h MIPS: qemu-malta: use YAMON-style GT64120 memory map 2013-10-28 09:01:48 +01:00